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Datasheet Intersil CD4076BMS

ManufacturerIntersil
SeriesCD4076BMS

CMOS 4 -Bit D-Type Register

Datasheets

  • Download » Datasheet, PDF, 274 Kb, Revision: 2017-12-22
    CD4076BMS Datasheet
    Docket ↓
    DATASHEET
    CD4076BMS FN3325
    Rev 0.00
    December 1992 CMOS 4 -Bit D-Type Registers Features Pinout High Voltage Type (20V Rating) CD4076BMS
    TOP VIEW Three State Outputs Input Disabled Without Gating the Clock OUTPUT
    DISABLE Gated Output Control Lines for Enabling or Disabling
    the Outputs M 1 16 VDD N 2 15 RESET Q1 3 14 DATA 1 Standardized Symmetrical Output Characteristics Q2 4 13 DATA 2 100% Tested for Quiescent Current at 20V Q3 5 12 DATA 3 Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Noise Margin (Over Full Package/Temperature Range)
    -1V at VDD = 5V
    -2V at VDD = 10V
    -2.5V at VDD = 15V 5V, 10V and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard
    No. 13B, “Standard Specifications for Description of
    ‘B’ Series CMOS Devices” 6 11 DATA 4 7 10 G2 VSS 8 9 G1 DATA INPUT
    DISABLE
    G1 CD4076BMS types are four-bit registers consisting of D-type
    flip-flops that feature three-state outputs. Data Disable inputs
    are provided to control the entry of data into the flip-flops.
    When both Data Disable inputs are low, data at the D inputs
    are loaded into their respective flip-flops on the next positive
    transition of the clock input. Output Disable inputs are also
    provided. When the Output Disable inputs are both low, the
    normal logic states of the four outputs are available to the
    load. The outputs are disabled independently of the clock by
    a high logic level at either Output Disable input, and present ...

Prices

Packaging

CD4076BDMSRCD4076BHSRCD4076BKMSR
Intersil D16.3
Package16 Ld SBDIP16 Ld CFP
Package IndexD16.3K16.A
Pin Count1616
FamilySBDIPCFP

Parametrics

CD4076BDMSRCD4076BHSRCD4076BKMSR
CD4076BDMSR
ClassVVV
DLA SMD5962-966565962-966565962-96656
DescriptionCMOS 4 -Bit D-Type RegisterCMOS 4 -Bit D-Type RegisterCMOS 4 -Bit D-Type Register
High Dose Rate (HDR) krad(Si)100100100
Low Dose Rate (ELDRS) krad(Si)ELDRS freeELDRS freeELDRS free
Operating Temperature Range-55 to 125-55 to 125-55 to 125
Qualification LevelQML Class V (space)QML Class V (space)QML Class V (space)
SEL (MeV/mg/cm2)757575

Eco Plan

CD4076BDMSRCD4076BHSRCD4076BKMSR
RoHSCompliantCompliantCompliant

Moldel Line

Series: CD4076BMS (3)

Manufacturer's Classification

  • Space & Harsh Environment > Rad Hard Digital > RH Latches

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