Datasheet LTC2495 (Analog Devices) - 4

ManufacturerAnalog Devices
Description16-Bit 8-/16-Channel ΔΣ ADC with PGA, Easy Drive and I2C Interface
Pages / Page34 / 4 — analog input anD reFerence. The. denotes the specifications which apply …
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analog input anD reFerence. The. denotes the specifications which apply over the full operating

analog input anD reFerence The denotes the specifications which apply over the full operating

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LTC2495
analog input anD reFerence The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Input Voltage Range (IN+ – IN–) Differential/Single-Ended l –FS +FS V FS Full-Scale of the Input (IN+ – IN–) Differential/Single-Ended l 0.5VREF/Gain V LSB Least Significant Bit of the Output Code l FS/216 REF+ Absolute/Common Mode REF+ Voltage l 0.1 VCC V REF– Absolute/Common Mode REF– Voltage l GND REF+ – 0.1V V VREF Reference Voltage Range (REF+ – REF–) l 0.1 VCC V CS(IN+) IN+ Sampling Capacitance 11 pF CS(IN–) IN– Sampling Capacitance 11 pF CS(VREF) VREF Sampling Capacitance 11 pF I + DC_LEAK(IN ) IN+ DC Leakage Current Sleep Mode, IN+ = GND l –10 1 10 nA I – DC_LEAK(IN ) IN– DC Leakage Current Sleep Mode, IN– = GND l –10 1 10 nA I + DC_LEAK(REF ) REF+ DC Leakage Current Sleep Mode, REF+ = VCC l –100 1 100 nA I – DC_LEAK(REF ) REF– DC Leakage Current Sleep Mode, REF– = GND l –100 1 100 nA tOPEN MUX Break-Before-Make 50 ns QIRR MUX Off Isolation VIN = 2VP-P DC to 1.8MHz 120 dB
i2c inputs anD Digital outputs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage l 0.7VCC V VIL Low Level Input Voltage l 0.3VCC V VIHA Low Level Input Voltage for Address Pins CA0, CA1, CA2 and Pin fO l 0.05VCC V VILA High Level Input Voltage for Address Pins CA0, CA1, CA2 l 0.95VCC V RINH Resistance from CA0, CA1, CA2 to VCC to Set Chip Address Bit to 1 l 10 kW RINL Resistance from CA0, CA1, CA2 to GND to Set Chip Address Bit to 0 l 10 kW RINF Resistance from CA0, CA1, CA2 to GND or VCC to Set Chip Address Bit l 2 MW to Float II Digital Input Current (fO) l –10 10 µA VHYS Hysteresis of Schmitt Trigger Inputs (Note 5) l 0.05VCC V VOL Low Level Output Voltage (SDA) I = 3mA l 0.4 V tOF Output Fall Time VIH(MIN) to VIL(MAX) Bus Load CB 10pF to l 20 + 0.1CB 250 ns 400pF (Note 14) IIN Input Leakage (SDA/SCL) 0.1VCC ≤ VIN ≤ 0.9 • VCC l 1 µA CCAX External Capacitative Load on Chip Address Pins (CA0, CA1, CA2) for l 10 pF Valid Float
power requireMents The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 5.5 V ICC Supply Current Conversion Current (Note 11) l 160 275 µA Temperature Measurement (Note 11) l 200 300 µA Sleep Mode (Note 11) l 1 2 µA 2495fe 4 For more information www.linear.com/LTC2495 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration order information Electrical Characteristics (Normal Speed) Electrical Characteristics (2x Speed) Converter Characteristics Analog Input and Reference I2C Inputs And Digital Outputs Power Requirements Digital Inputs And Digital Outputs I2C Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Package Description Revision History Related Parts
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