Datasheet LTM9003 (Analog Devices) - 17

LTM9003 applicaTions inForMaTion
Table 2b. LO Input Impedance vs Frequency (LTM9003-AB) Mixer Enable Interface FREQUENCY S11
The voltage necessary to turn on the mixer is 2.7V. To dis-
(MHz) INPUT IMPEDANCE MAG ANGLE
able the mixer, the enable voltage must be less than 0.3V. 500 14.3 – j7.5 0.68 –150.6 If the MIX_EN pin is allowed to float, the mixer will tend 600 12.6 – j2.4 0.61 –170.4 to remain in its last operating state. Thus it is not recom- 700 15.8 + j1.9 0.53 170.8 mended that the enable function be used in this manner. 800 22.7 + j4.1 0.44 151.5 If the shutdown function is not required, then the MIX_EN 900 32.5 + j3.8 0.35 130.2 pin should be connected directly to VCC1. 1000 44.2 + j1.3 0.25 104.9 1100 56.3 – j1.2 0.18 70.3
Amplifier Enable Interface
1200 66 – j1.3 0.15 26.4 The AMP_EN pin self-biases to VCC2 through a 30k resis- 1300 70.7 + j1 0.18 –12.8 tor. The pin must be pulled below 0.8V in order to disable 1400 69.9 + j3.1 0.21 –37.8 the amplifier. 1500 66 + j3.7 0.25 –54.1 1600 61.8 + j3.3 0.27 –65.5
Driving the ADC Clock Input
1700 58.1 + j2.4 0.28 –73.4 The noise performance of the ADC can depend on the 1800 54.9 + j1.5 0.29 –79.8 encode signal quality as much as on the analog input. The 1900 52.7 + j0.8 0.28 –84.2 ENC+/ENC– inputs are intended to be driven differentially, 2000 50.7 + j0.2 0.28 –88.5 primarily for noise immunity from common mode noise 2100 49.4 – j0.2 0.27 –91.4 sources. Each input is biased through a 4.8k resistor to 2200 47.8 – j0.5 0.25 –95.5 a 1.5V bias. The bias resistors set the DC operating point 2300 46.7 – j0.7 0.23 –98.9 for transformer coupled drive circuits and can set the logic 2400 45.7 – j0.8 0.2 –103.3 threshold for single-ended drive circuits. 2500 45.5 – j0.7 0.17 –106.8 2600 46.4 – j0.4 0.13 –107.1 Any noise present on the encode signal will result in ad- ditional aperture jitter that will be RMS summed with the 2700 48.7 – j0.1 0.1 –97.9 inherent ADC aperture jitter. 2800 50.9 + j0.1 0.09 –84.2 2900 52.9 + j0.3 0.09 –72.5 In applications where jitter is critical (high input frequen- 3000 54.6 + j0.5 0.11 –66.7 cies) take the following into consideration: 1. Differential drive should be used. 0 2. Use as large an amplitude as possible; if transformer 600MHz MATCH (6.8nH + 5.6pF) coupled use a higher turns ratio to increase the –5 amplitude. –10 3. If the ADC is clocked with a sinusoidal signal, filter the –15 encode signal to reduce wideband noise. NO MATCHING –20 4. Balance the capacitance and series resistance at both RETURN LOSS (dB) ELEMENTS encode inputs so that any coupled noise will appear at –25 2GHz MATCH both inputs as common mode noise. The encode inputs (2.7nH + 0.5pF) have a common mode range of 1.2V to 2.0V. Each input –30100 1000 10000 may be driven from ground to VDD for single-ended FREQUENCY (MHz) 9003 F07 drive.
Figure 7. LO Input Return Loss with and without Matching
9003f Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Filter Characteristics Dynamic Accuracy Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagram Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Related Parts