Datasheet LTC3588-2 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Nanopower Energy Harvesting Power Supply with 14V Minimum VIN |
| Pages / Page | 18 / 7 — PIN FUNCTIONS PZ1 (Pin 1):. VIN2 (Pin 7):. PZ2 (Pin 2):. CAP (Pin 3):. D1 … |
| File Format / Size | PDF / 434 Kb |
| Document Language | English |
PIN FUNCTIONS PZ1 (Pin 1):. VIN2 (Pin 7):. PZ2 (Pin 2):. CAP (Pin 3):. D1 (Pin 8):. D0 (Pin 9):. IN (Pin 4):. PGOOD (Pin 10):
Model Line for this Datasheet
Text Version of Document
LTC3588-2
PIN FUNCTIONS PZ1 (Pin 1):
Input connection for piezoelectric element or
VIN2 (Pin 7):
Internal low voltage rail to serve as gate drive other AC source (used in conjunction with PZ2). for buck NMOS switch. Also serves as a logic high rail for
PZ2 (Pin 2):
Input connection for piezoelectric element or output voltage select bits D0 and D1. A 4.7µF capacitor other AC source (used in conjunction with PZ1). should be connected from VIN2 to GND. This pin is not intended for use as an external system rail.
CAP (Pin 3):
Internal rail referenced to VIN to serve as gate drive for buck PMOS switch. A 1µF capacitor should be
D1 (Pin 8):
Output Voltage Select Bit. D1 should be tied connected between CAP and V high to VIN2 or low to GND to select desired VOUT (see IN. This pin is not intended for use as an external system rail. Table 1).
V D0 (Pin 9):
Output Voltage Select Bit. D0 should be tied
IN (Pin 4):
Rectified Input Voltage. A capacitor on this pin serves as an energy reservoir and input supply for the high to VIN2 or low to GND to select desired VOUT (see buck regulator. The V Table 1). IN voltage is internally clamped to a maximum of 20V (typical).
PGOOD (Pin 10):
Power good output is logic high when
SW (Pin 5):
Switch Pin for the Buck Switching Regulator. VOUT is above 92% of the target value. The logic high is A 22µH or larger inductor should be connected from SW referenced to the VOUT rail. to VOUT.
GND (Exposed Pad Pin 11):
Ground. The Exposed Pad
V
should be connected to a continuous ground plane on the
OUT (Pin 6):
Sense pin used to monitor the output volt- age and adjust it through internal feedback. second layer of the printed circuit board by several vias directly under the LTC3588-2.
BLOCK DIAGRAM
VIN 4 20V INTERNAL RAIL GENERATION 3 CAP PZ1 1 5 SW 7 VIN2 PZ2 2 UVLO BUCK CONTROL 11 GND SLEEP BANDGAP REFERENCE 6 VOUT 8, 9 2 D1, D0 PGOOD COMPARATOR 10 PGOOD 35882 BD 35882fc For more information www.linear.com/LTC3588-2 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts
PIN FUNCTIONS PZ1 (Pin 1):
Input connection for piezoelectric element or
VIN2 (Pin 7):
Internal low voltage rail to serve as gate drive other AC source (used in conjunction with PZ2). for buck NMOS switch. Also serves as a logic high rail for
PZ2 (Pin 2):
Input connection for piezoelectric element or output voltage select bits D0 and D1. A 4.7µF capacitor other AC source (used in conjunction with PZ1). should be connected from VIN2 to GND. This pin is not intended for use as an external system rail.
CAP (Pin 3):
Internal rail referenced to VIN to serve as gate drive for buck PMOS switch. A 1µF capacitor should be
D1 (Pin 8):
Output Voltage Select Bit. D1 should be tied connected between CAP and V high to VIN2 or low to GND to select desired VOUT (see IN. This pin is not intended for use as an external system rail. Table 1).
V D0 (Pin 9):
Output Voltage Select Bit. D0 should be tied
IN (Pin 4):
Rectified Input Voltage. A capacitor on this pin serves as an energy reservoir and input supply for the high to VIN2 or low to GND to select desired VOUT (see buck regulator. The V Table 1). IN voltage is internally clamped to a maximum of 20V (typical).
PGOOD (Pin 10):
Power good output is logic high when
SW (Pin 5):
Switch Pin for the Buck Switching Regulator. VOUT is above 92% of the target value. The logic high is A 22µH or larger inductor should be connected from SW referenced to the VOUT rail. to VOUT.
GND (Exposed Pad Pin 11):
Ground. The Exposed Pad
V
should be connected to a continuous ground plane on the
OUT (Pin 6):
Sense pin used to monitor the output volt- age and adjust it through internal feedback. second layer of the printed circuit board by several vias directly under the LTC3588-2.
BLOCK DIAGRAM
VIN 4 20V INTERNAL RAIL GENERATION 3 CAP PZ1 1 5 SW 7 VIN2 PZ2 2 UVLO BUCK CONTROL 11 GND SLEEP BANDGAP REFERENCE 6 VOUT 8, 9 2 D1, D0 PGOOD COMPARATOR 10 PGOOD 35882 BD 35882fc For more information www.linear.com/LTC3588-2 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Revision History Typical Application Related Parts
