Datasheet AD6640 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Multi-Channel, Multi-Mode Receiver Chipset |
| Pages / Page | 25 / 10 — AD6640. AIN = 19.5MHz. ENCODE = 65MSPS AIN = 15.0MHz, 16.0MHz. NO DITHER. … |
| Revision | A |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
AD6640. AIN = 19.5MHz. ENCODE = 65MSPS AIN = 15.0MHz, 16.0MHz. NO DITHER. WORST SPUR. SNR. 100. SNR, WORST CASE SPURIOUS – dB, dBc
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Text Version of Document
AD6640 0 85 AIN = 19.5MHz ENCODE = 65MSPS AIN = 15.0MHz, 16.0MHz 20 NO DITHER WORST SPUR 80 40 75 60 70 SNR 80 65 100 SNR, WORST CASE SPURIOUS – dB, dBc POWER RELATIVE TO ADC FULL SCALE – dB 120 60 dc 6.5 13.0 19.5 26.0 32.5 dc 8 16 24 32 40 48 56 64 72 80 FREQUENCY – MHz SAMPLE RATE – MSPS
TPC 7. Two Tones at 15.0 MHz and 16.0 MHz TPC 10. SNR, Worst Spurious vs. ENCODE
100 90 ENCODE = 65MSPS 90 85 dBFS AIN = 2.2MHz 80 80 WORST SPUR 75 70 70 ENCODE = 65MSPS SNR 60 AIN = 31.0MHz 65 50 60 SFDR = 80dB 40 55 dBc REFERENCE LINE 50 30 45 20 40 10 35 WORST CASE SPURIOUS – dBc and dBFS 0 SNR, WORST FULL-SCALE SPURIOUS – dB, dBc 30 –80 –70 –60 –50 –40 –30 –20 –10 0 25 30 35 40 45 50 55 60 65 70 75 ANALOG INPUT POWER LEVEL – dBFS ENCODE DUTY CYCLE – %
TPC 8. Single Tone SFDR TPC 11. SNR, Worst Spurious vs. Duty Cycle
100 90 90 85 ENCODE = 65MSPS 2.2MHz WORST SPUR dBFS 80 80 69MHz 75 70 dBc 70 ENCODE = 65MSPS 60 F1 = 15.0MHz 65 2.2MHz SNR 50 F2 = 16.0MHz 60 69MHz SFDR = 80dB 40 55 REFERENCE LINE 50 30 45 20 40 10 35 WORST CASE SPURIOUS – dBc and dBFS 0 SNR, WORST FULL-SCALE SPURIOUS – dB, dBc 30 –80 –70 –60 –50 –40 –30 –20 –10 0 –15 –12 –9 –6 –3 0 3 6 9 12 15 INPUT POWER LEVEL (F1 = F2) – dBFS ENCODE POWER – dBm
TPC 9. Two Tone SFDR TPC 12. SNR, Worst Spurious vs. ENCODE Power REV. A –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS AC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Analog Bandwidth (Small Signal) Aperture Delay Aperture Uncertainty (Jitter) Differential Nonlinearity Encode Pulsewidth/Duty Cycle Integral Nonlinearity Minimum Conversion Rate Maximum Conversion Rate Output Propagation Delay Power Supply Rejection Ratio Signal-to-Noise-and-Distortion (SINAD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) Two-Tone Intermodulation Distortion Rejection Two-Tone SFDR Worst Harmonic Equivalent Circuits Typical Performance Characteristics THEORY OF OPERATION APPLYING THE AD6640 Encoding the AD6640 Driving the Analog Input Power Supplies Output Loading Layout Information Evaluation Boards DIGITAL WIDEBAND RECEIVERS Introduction System Description System Requirements Noise Floor and SNR Processing Gain Overcoming Static Nonlinearities with Dither Receiver Example IF Sampling Using the AD6640 as a Mix-Down Stage RECEIVE CHAIN FOR A PHASED-ARRAY CELLULAR BASE STATION OUTLINE DIMENSIONS Revision History
TPC 7. Two Tones at 15.0 MHz and 16.0 MHz TPC 10. SNR, Worst Spurious vs. ENCODE
100 90 ENCODE = 65MSPS 90 85 dBFS AIN = 2.2MHz 80 80 WORST SPUR 75 70 70 ENCODE = 65MSPS SNR 60 AIN = 31.0MHz 65 50 60 SFDR = 80dB 40 55 dBc REFERENCE LINE 50 30 45 20 40 10 35 WORST CASE SPURIOUS – dBc and dBFS 0 SNR, WORST FULL-SCALE SPURIOUS – dB, dBc 30 –80 –70 –60 –50 –40 –30 –20 –10 0 25 30 35 40 45 50 55 60 65 70 75 ANALOG INPUT POWER LEVEL – dBFS ENCODE DUTY CYCLE – %
TPC 8. Single Tone SFDR TPC 11. SNR, Worst Spurious vs. Duty Cycle
100 90 90 85 ENCODE = 65MSPS 2.2MHz WORST SPUR dBFS 80 80 69MHz 75 70 dBc 70 ENCODE = 65MSPS 60 F1 = 15.0MHz 65 2.2MHz SNR 50 F2 = 16.0MHz 60 69MHz SFDR = 80dB 40 55 REFERENCE LINE 50 30 45 20 40 10 35 WORST CASE SPURIOUS – dBc and dBFS 0 SNR, WORST FULL-SCALE SPURIOUS – dB, dBc 30 –80 –70 –60 –50 –40 –30 –20 –10 0 –15 –12 –9 –6 –3 0 3 6 9 12 15 INPUT POWER LEVEL (F1 = F2) – dBFS ENCODE POWER – dBm
TPC 9. Two Tone SFDR TPC 12. SNR, Worst Spurious vs. ENCODE Power REV. A –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS AC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Analog Bandwidth (Small Signal) Aperture Delay Aperture Uncertainty (Jitter) Differential Nonlinearity Encode Pulsewidth/Duty Cycle Integral Nonlinearity Minimum Conversion Rate Maximum Conversion Rate Output Propagation Delay Power Supply Rejection Ratio Signal-to-Noise-and-Distortion (SINAD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) Two-Tone Intermodulation Distortion Rejection Two-Tone SFDR Worst Harmonic Equivalent Circuits Typical Performance Characteristics THEORY OF OPERATION APPLYING THE AD6640 Encoding the AD6640 Driving the Analog Input Power Supplies Output Loading Layout Information Evaluation Boards DIGITAL WIDEBAND RECEIVERS Introduction System Description System Requirements Noise Floor and SNR Processing Gain Overcoming Static Nonlinearities with Dither Receiver Example IF Sampling Using the AD6640 as a Mix-Down Stage RECEIVE CHAIN FOR A PHASED-ARRAY CELLULAR BASE STATION OUTLINE DIMENSIONS Revision History
