Datasheet 2N7000 (Microchip) - 5

ManufacturerMicrochip
DescriptionN-Channel Enhancement-Mode Vertical DMOS FET
Pages / Page5 / 5 — 2N7000. 3-Lead TO-92 Package Outline (N3). 1 2 3. Front View. Side View. …
Revision09-10-2008
File Format / SizePDF / 645 Kb
Document LanguageEnglish

2N7000. 3-Lead TO-92 Package Outline (N3). 1 2 3. Front View. Side View. Bottom View. Symbol. Drawings not to scale. Supertex Doc.#:

2N7000 3-Lead TO-92 Package Outline (N3) 1 2 3 Front View Side View Bottom View Symbol Drawings not to scale Supertex Doc.#:

Model Line for this Datasheet

Text Version of Document

2N7000 3-Lead TO-92 Package Outline (N3)
D A Seating Plane
1 2 3
L c b e1 e
Front View Side View
E E1 1 3 2
Bottom View Symbol A b c D E E1 e e1 L
MIN .170 .014† .014† .175 .125 .080 .095 .045 .500 Dimensions (inches) NOM - - - - - - - - - MAX .210 .022† .022† .205 .165 .105 .105 .055 .610* JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing.
Drawings not to scale. Supertex Doc.#:
DSPD-3TO92N3, Version E041009. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)
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