Datasheet LT1681 (Analog Devices) - 10

LT1681
U U W U APPLICATIO S I FOR ATIO Overview
voltage on the VC pin, the switches are disabled until the next switch cycle. The LT1681 is a high voltage, high current synchronous regulator controller, optimized for use with dual transistor During normal operation, the LT1681 internal oscillator forward topologies. The IC uses a constant frequency, runs at twice the switching frequency. The oscillator current mode architecture with internal logic that prevents output toggles a T flip-flop, generating a 50% duty cycle operation over 50% duty cycle. A unique synchronization pulse that is used internally as the system clock for the IC. scheme allows the system clock to be synchronized up to When the output of this flip-flop transitions high, the an operational frequency of 350kHz, along with phase primary switches are enabled. The primary-side switches control for easy integration of multicontroller systems. A stay enabled until the transformer primary current, sensed local precision 5V supply is available for external support via the SENSE pin, connected to a ground-referenced circuitry and can be loaded up to 20mA. resistor in series with the bottom-side switch FET, is sufficient to trip the current sense comparator and, in turn, Internal fault detection circuitry disables switching when reset the RS latch. When the RS latch resets, the primary a variety of system faults are detected such as: input switches are disabled and the synchronous switch is supply overvoltage or undervoltage faults, excessive sys- enabled. The adaptive blanking circuit senses the bottom- tem temperature, transformer primary-side saturation and side gate voltage via the BLKSENS pin and prevents local supply overcurrent conditions. The LT1681 has a current sensing until the FET is fully enabled, preventing current limit soft-start feature that gradually increases the false triggering due to a turn-on transition glitch. If the current drive capability of a converter system to yield a current comparator threshold is not obtained when the smooth start-up with minimal overshoot. The soft-start flip-flop output transitions low, the RS latch is bypassed circuitry is also used for smooth recoveries from system and the primary switches are disabled until the next flip- fault conditions. flop output transition, forcing a maximum switch duty External FET switches are employed for the switch ele- cycle less than 50%. ments, and hearty switch drivers allow implementation of high current designs. An adaptive blanking scheme built
System Fault Detection—The General Fault Condition
into the LT1681 allows for correct current-sense blanking
(GFC)
regardless of switch size and even while using external The LT1681 contains circuitry for detecting internal and switch drive buffers. The LT1681 employs a voltage output system faults. Detection of a fault triggers a “general fault error amplifier, providing superior integrator linearity and condition” or GFC. When a GFC is detected, the LT1681 allowing easy high bandwidth integration of optocoupler disables switching and discharges the soft-start capaci- feedback for fully isolated solutions. tor. When the GFC subsides, the LT1681 initiates a start- up cycle via the soft-start circuitry to assure a graceful
Theory of Operation (See Block Diagram)
recovery. Recovery from a GFC is gated by the soft-start The LT1681 senses the output voltage of its associated capacitor discharge. The capacitor must be discharged to converter via the VFB pin. The difference between the a threshold of 225mV before the GFC can be concluded. As voltage on this pin and an internal 1.25V reference is the zero output current threshold of the SS pin is typically amplified to generate an error voltage on the VC pin, which a transistor VBE, or 0.7V, latching the GFC until a 225mV is used as a threshold for the current sense comparator. threshold is achieved assures a zero output current state The current sense comparator gets its information from is obtained in the event of a short-duration fault. A GFC is the SENSE pin, which monitors the voltage drop across an also triggered during a system state change event, such as external current sense resistor. When the detected switch entering shutdown mode, to prevent any mode transition current increases to the level corresponding to the error abnormalities. 1681f 10