Datasheet LT1169 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionDual Low Noise, Picoampere Bias Current, JFET Input Op Amp
Pages / Page12 / 4 — ELECTRICAL CHAR C. A TERISTICS VS =. 15V, VCM = 0V, –40. C, (Note 7), …
File Format / SizePDF / 302 Kb
Document LanguageEnglish

ELECTRICAL CHAR C. A TERISTICS VS =. 15V, VCM = 0V, –40. C, (Note 7), unless otherwise noted. SYMBOL. PARAMETER

ELECTRICAL CHAR C A TERISTICS VS = 15V, VCM = 0V, –40 C, (Note 7), unless otherwise noted SYMBOL PARAMETER

Model Line for this Datasheet

Text Version of Document

LT1169
ELECTRICAL CHAR C A TERISTICS VS =
±
15V, VCM = 0V, –40
°
C

TA

85
°
C, (Note 7), unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note 1) MIN TYP MAX UNITS
∆VOS Offset Voltage Match ● 1.8 6 mV ∆I + B Noninverting Bias Current Match ● 10 180 pA ∆CMRR Common Mode Rejection Match (Note 8) ● 73 93 dB ∆PSRR Power Supply Rejection Match (Note 8) ● 75 92 dB The ● denotes specifications which apply over the full operating
Note 6:
Slew rate is measured in AV = –1; input signal is ±7.5V, output temperature range. measured at ±2.5V.
Note 1:
Typical parameters are defined as the 60% yield of parameter
Note 7:
The LT1169 is designed, characterized and expected to meet these distributions of individual amplifiers, i.e., out of 100 LT1169s (200 op extended temperature limits, but is not tested at – 40°C and 85°C. amps) typically 120 op amps will be better than the indicated specification. Guaranteed I grade parts are available; consult factory.
Note 2:
IB and IOS readings are extrapolated to a warmed-up temperature
Note 8:
∆CMRR and ∆PSRR are defined as follows: from 25°C measurements and 45°C characterization data. (1) CMRR and PSRR are measured in µV/V on the individual
Note 3:
Current noise is calculated from the formula: amplifiers. (2) The difference is calculated between the matching sides in µV/V. in = (2qIB)1/2 (3) The result is converted to dB. where q = 1.6 × 10 –19 coulomb. The noise of source resistors up to 200M
Note 9:
The LT1169 is measured in an automated tester in less than one swamps the contribution of current noise. second after application of power. Depending on the package used, power
Note 4:
Input voltage range functionality is assured by testing offset dissipation, heat sinking, and air flow conditions, the fully warmed-up chip voltage at the input voltage range limits to a maximum of 2.8mV. temperature can be 10°C to 50°C higher than the ambient temperature.
Note 5:
This parameter is not 100% tested.
W U TYPICAL PERFOR A CE CHAR C A TERISTICS 1kHz Input Noise Voltage 0.1Hz to 10Hz Voltage Noise Distribution Voltage Noise vs Frequency
50 100 T T A = 25°C A = 25°C V V S = ±15V S = ±15V 40 510 OP AMPS TESTED √Hz) µV/DIV) 30 10 TYPICAL 20 1/f CORNER PERCENT OF UNITS (%) VOLTAGE NOISE (1 60Hz 10 RMS VOLTAGE NOISE (nV/ 0 1 0 2 4 6 8 10 4.2 4.6 5.0 5.4 5.8 6.2 6.6 7.0 7.4 7.8 8.2 1 10 100 1k 10k TIME (SEC) INPUT VOLTAGE NOISE (nV/√Hz) FREQUENCY (Hz) LT1169 • TPC01 LT1169 • TPC03 LT1169 • TPC02 4
EMS supplier