Datasheet LT1169 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp |
| Pages / Page | 12 / 5 — TYPICAL PERFOR A CE CHAR C. A TERISTICS. Input Bias and Offset Currents. … |
| File Format / Size | PDF / 302 Kb |
| Document Language | English |
TYPICAL PERFOR A CE CHAR C. A TERISTICS. Input Bias and Offset Currents. Voltage Noise vs Chip Temperature. vs Chip Temperature
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LT1169
W U TYPICAL PERFOR A CE CHAR C A TERISTICS Input Bias and Offset Currents Input Bias and Offset Currents Voltage Noise vs Chip Temperature vs Chip Temperature Over the Common Mode Range
10 30n 10 VS = ±15V V T 10n S = ±15V A = 25°C 9 V 8 CM = –10 TO 13V VS = ±15V √Hz) 3n 6 8 1n 4 7 BIAS 300p BIAS CURRENT CURRENT 2 6 100p 0 OFFSET CURRENT 5 30p –2 10p OFFSET –4 4 CURRENT 3p –6 VOLTAGE NOISE (AT 1kHz) (nV/ 3 INPUT BIAS AND OFFSET CURRENTS (A) 1p –8 INPUT BIAS AND OFFSET CURRENTS (pA) 2 0.3p –10 –75 –50 –25 0 25 50 75 100 125 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 TEMPERATURE (°C) TEMPERATURE (°C) COMMON MODE RANGE (V) LT1169 • TPC04 LT1169 • TPC05* LT1169 • TPC06
Common Mode Limit Common Mode Rejection Ratio Power Supply Rejection Ratio vs Temperature vs Frequency vs Frequency
V+ 0 120 120 T T A = 25°C –0.5 A = 25°C V 100 S = ±15V 100 –1.0 +PSRR V+ = 5V TO 20V –1.5 80 80 –2.0 –PSRR 60 60 3.0 40 40 2.5 COMMON MODE LIMIT (V) REFERRED TO POWER SUPPLY 2.0 20 20 V – = – 5V TO – 20V 1.5 COMMON MODE REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) V– +1.0 0 0 –60 –20 20 60 100 140 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M TEMPERATURE (°C) FREQUENCY (Hz) FREQUENCY (Hz) LT1169 • TPC08 LT1169 • TPC07 LT1169 • TPC09
Gain and Phase Shift Voltage Gain vs Frequency Voltage Gain vs Chip Temperature vs Frequency
180 10 50 60 TA = 25°C V T S = ±15V A = 25°C V 9 S = ±15V V V O = ±10V, RL = 1k S = ±15V 40 C 80 140 8 VO = ±12V, RL = 10k L = 10pF PHASE SHIFT (DEG) 7 µV) 30 100 100 6 RL =10k 5 20 120 PHASE 60 4 RL = 1k VOLTAGE GAIN (dB) 10 140 3 VOLTAGE GAIN (dB) VOLTAGE GAIN (V/ GAIN 20 2 0 160 1 –20 0 –10 180 0.01 1 100 10k 1M 100M –75 –50 –25 0 25 50 75 100 125 0.1 1 10 100 FREQUENCY (Hz) CHIP TEMPERATURE (°C) FREQUENCY (MHz) LT1169 • TPC10 LT1169 • TPC11 LT1169 • TPC12 5
W U TYPICAL PERFOR A CE CHAR C A TERISTICS Input Bias and Offset Currents Input Bias and Offset Currents Voltage Noise vs Chip Temperature vs Chip Temperature Over the Common Mode Range
10 30n 10 VS = ±15V V T 10n S = ±15V A = 25°C 9 V 8 CM = –10 TO 13V VS = ±15V √Hz) 3n 6 8 1n 4 7 BIAS 300p BIAS CURRENT CURRENT 2 6 100p 0 OFFSET CURRENT 5 30p –2 10p OFFSET –4 4 CURRENT 3p –6 VOLTAGE NOISE (AT 1kHz) (nV/ 3 INPUT BIAS AND OFFSET CURRENTS (A) 1p –8 INPUT BIAS AND OFFSET CURRENTS (pA) 2 0.3p –10 –75 –50 –25 0 25 50 75 100 125 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 TEMPERATURE (°C) TEMPERATURE (°C) COMMON MODE RANGE (V) LT1169 • TPC04 LT1169 • TPC05* LT1169 • TPC06
Common Mode Limit Common Mode Rejection Ratio Power Supply Rejection Ratio vs Temperature vs Frequency vs Frequency
V+ 0 120 120 T T A = 25°C –0.5 A = 25°C V 100 S = ±15V 100 –1.0 +PSRR V+ = 5V TO 20V –1.5 80 80 –2.0 –PSRR 60 60 3.0 40 40 2.5 COMMON MODE LIMIT (V) REFERRED TO POWER SUPPLY 2.0 20 20 V – = – 5V TO – 20V 1.5 COMMON MODE REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB) V– +1.0 0 0 –60 –20 20 60 100 140 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M TEMPERATURE (°C) FREQUENCY (Hz) FREQUENCY (Hz) LT1169 • TPC08 LT1169 • TPC07 LT1169 • TPC09
Gain and Phase Shift Voltage Gain vs Frequency Voltage Gain vs Chip Temperature vs Frequency
180 10 50 60 TA = 25°C V T S = ±15V A = 25°C V 9 S = ±15V V V O = ±10V, RL = 1k S = ±15V 40 C 80 140 8 VO = ±12V, RL = 10k L = 10pF PHASE SHIFT (DEG) 7 µV) 30 100 100 6 RL =10k 5 20 120 PHASE 60 4 RL = 1k VOLTAGE GAIN (dB) 10 140 3 VOLTAGE GAIN (dB) VOLTAGE GAIN (V/ GAIN 20 2 0 160 1 –20 0 –10 180 0.01 1 100 10k 1M 100M –75 –50 –25 0 25 50 75 100 125 0.1 1 10 100 FREQUENCY (Hz) CHIP TEMPERATURE (°C) FREQUENCY (MHz) LT1169 • TPC10 LT1169 • TPC11 LT1169 • TPC12 5
