Datasheet LT8612 (Analog Devices) - 10

ManufacturerAnalog Devices
Description42V, 6A Synchronous Step-Down Regulator with 3μA Quiescent Current
Pages / Page22 / 10 — OPERATION
File Format / SizePDF / 365 Kb
Document LanguageEnglish

OPERATION

OPERATION

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LT8612
OPERATION
The LT8612 is a monolithic, constant frequency, current the input supply when regulating with no load. The SYNC mode step-down DC/DC converter. An oscillator, with pin is tied low to use Burst Mode operation and can be frequency set using a resistor on the RT pin, turns on tied to a logic high to use pulse-skipping mode. If a clock the internal top power switch at the beginning of each is applied to the SYNC pin the part will synchronize to an clock cycle. Current in the inductor then increases until external clock frequency and operate in pulse-skipping the top switch current comparator trips and turns off the mode. While in pulse-skipping mode the oscillator oper- top power switch. The peak inductor current at which the ates continuously and positive SW transitions are aligned top switch turns off is controlled by the voltage on the to the clock. During light loads, switch pulses are skipped internal VC node. The error amplifier servos the VC node to regulate the output and the quiescent current will be by comparing the voltage on the VFB pin with an inter- several hundred µA. nal 0.97V reference. When the load current increases it To improve efficiency across all loads, supply current to causes a reduction in the feedback voltage relative to the internal circuitry can be sourced from the BIAS pin when reference leading the error amplifier to raise the VC volt- biased at 3.3V or above. Else, the internal circuitry will age until the average inductor current matches the new draw current from V load current. When the top power switch turns off, the IN. The BIAS pin should be connected to V synchronous power switch turns on until the next clock OUT if the LT8612 output is programmed at 3.3V or above. cycle begins or inductor current falls to zero. If overload conditions result in more than 10A flowing through the Comparators monitoring the FB pin voltage wil pul the PG bottom switch, the next clock cycle will be delayed until pin low if the output voltage varies more than ±9% (typi- switch current returns to a safe level. cal) from the set point, or if a fault condition is present. If the EN/UV pin is low, the LT8612 is shut down and The oscillator reduces the LT8612’s operating frequency draws 1µA from the input. When the EN/UV pin is above when the voltage at the FB pin is low. This frequency 1V, the switching regulator will become active. foldback helps to control the inductor current when the output voltage is lower than the programmed value which To optimize efficiency at light loads, the LT8612 operates occurs during start-up or overcurrent conditions. When in Burst Mode operation in light load situations. Between a clock is applied to the SYNC pin or the SYNC pin is bursts, all circuitry associated with controlling the output held DC high, the frequency foldback is disabled and the switch is shut down, reducing the input supply current to switching frequency will slow down only during overcur- 1.7μA. In a typical application, 3μA will be consumed from rent conditions. 8612fa 10 For more information www.linear.com/LT8612 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
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