Datasheet AD8366 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | DC to 600 MHz, Dual-Digital Variable Gain Amplifiers |
| Pages / Page | 28 / 1 — DC to 600 MHz,. Dual-Digital Variable Gain Amplifiers. Data Sheet. … |
| Revision | B |
| File Format / Size | PDF / 893 Kb |
| Document Language | English |
DC to 600 MHz,. Dual-Digital Variable Gain Amplifiers. Data Sheet. AD8366. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
DC to 600 MHz, Dual-Digital Variable Gain Amplifiers Data Sheet AD8366 FEATURES FUNCTIONAL BLOCK DIAGRAM A Matched pair of differential, digitally controlled VGAs A A A A B CA S MA SO P M N Gain range: 4.5 dB to 20.25 dB DE OF CCM VC VP OP OP SE 0.25 dB gain step size Operating frequency DC to 150 MHz (2 V p-p) VPSIA BIT0/CS 3 dB bandwidth: 600 MHz IPPA BIT1/SDAT Noise figure (NF) IPMA BIT2/SCLK 11.4 dB at 10 MHz at maximum gain ENBL BIT3 18 dB at 10 MHz at minimum gain DIGITAL GAIN OIP3: 45 dBm at 10 MHz ICOM CONTROL LOGIC OCOM HD2/HD3 IPMB BIT4 Better than −90 dBc for 2 V p-p output at 10 MHz at IPPB BIT 5 maximum gain VPSIB DENA Differential input and output Adjustable output common-mode Optional dc output offset correction B B B B B
01 0
Serial/parallel mode gain control CB S M O NB PPB M
4-
DE OF
58
CCM VC O OP DE
07
Power-down feature VPS
Figure 1.
Single 5 V supply operation APPLICATIONS Baseband I/Q receivers Diversity receivers Wideband ADC drivers GENERAL DESCRIPTION
The AD8366 is a matched pair of fully differential, low noise and The output common-mode voltage defaults to VPOS/2 but can low distortion, digitally programmable variable gain amplifiers be programmed via the VCMA and VCMB pins over a range (VGAs). The gain of each amplifier can be programmed separately of voltages. The input common-mode voltage also defaults or simultaneously over a range of 4.5 dB to 20.25 dB in steps of to VPOS/2 but can be driven down to 1.5 V. A built-in, dc offset 0.25 dB. The amplifier offers flat frequency performance from dc compensation loop can be used to eliminate dc offsets from prior to 70 MHz, independent of gain code. stages in the signal chain. This loop can also be disabled if dc- The AD8366 offers excellent spurious-free dynamic range, suitable coupled operation is desired. for driving high resolution analog-to-digital converters (ADCs). The digital interface allows for parallel or serial mode gain The NF at maximum gain is 11.4 dB at 10 MHz and increases programming. The AD8366 operates from a 4.75 V to 5.25 V ~2 dB for every 4 dB decrease in gain. Over the entire gain range, supply and consumes typically 180 mA. When disabled, the the HD3/HD2 are better than −90 dBc for 2 V p-p at the output at part consumes roughly 3 mA. The AD8366 is fabricated using 10 MHz into 200 Ω. The two-tone intermodulation distortion of Analog Devices, Inc., advanced silicon-germanium bipolar −90 dBc into 200 Ω translates to an OIP3 of 45 dBm (38 dBVrms). process, and it is available in a 32-lead exposed paddle LFCSP The differential input impedance of 200 Ω provides a well-defined package. Performance is specified over the −40°C to +85°C termination. The differential output has a low impedance of ~25 Ω. temperature range.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS PARALLEL AND SERIAL INTERFACE TIMING ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION INPUTS OUTPUTS OUTPUT DIFFERENTIAL OFFSET CORRECTION OUTPUT COMMON-MODE CONTROL GAIN CONTROL INTERFACE APPLICATIONS INFORMATION BASIC CONNECTIONS DIRECT CONVERSION RECEIVER DESIGN QUADRATURE ERRORS AND IMAGE REJECTION LOW FREQUENCY IMD3 PERFORMANCE BASEBAND INTERFACE CHARACTERIZATION SETUPS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
01 0
Serial/parallel mode gain control CB S M O NB PPB M
4-
DE OF
58
CCM VC O OP DE
07
Power-down feature VPS
Figure 1.
Single 5 V supply operation APPLICATIONS Baseband I/Q receivers Diversity receivers Wideband ADC drivers GENERAL DESCRIPTION
The AD8366 is a matched pair of fully differential, low noise and The output common-mode voltage defaults to VPOS/2 but can low distortion, digitally programmable variable gain amplifiers be programmed via the VCMA and VCMB pins over a range (VGAs). The gain of each amplifier can be programmed separately of voltages. The input common-mode voltage also defaults or simultaneously over a range of 4.5 dB to 20.25 dB in steps of to VPOS/2 but can be driven down to 1.5 V. A built-in, dc offset 0.25 dB. The amplifier offers flat frequency performance from dc compensation loop can be used to eliminate dc offsets from prior to 70 MHz, independent of gain code. stages in the signal chain. This loop can also be disabled if dc- The AD8366 offers excellent spurious-free dynamic range, suitable coupled operation is desired. for driving high resolution analog-to-digital converters (ADCs). The digital interface allows for parallel or serial mode gain The NF at maximum gain is 11.4 dB at 10 MHz and increases programming. The AD8366 operates from a 4.75 V to 5.25 V ~2 dB for every 4 dB decrease in gain. Over the entire gain range, supply and consumes typically 180 mA. When disabled, the the HD3/HD2 are better than −90 dBc for 2 V p-p at the output at part consumes roughly 3 mA. The AD8366 is fabricated using 10 MHz into 200 Ω. The two-tone intermodulation distortion of Analog Devices, Inc., advanced silicon-germanium bipolar −90 dBc into 200 Ω translates to an OIP3 of 45 dBm (38 dBVrms). process, and it is available in a 32-lead exposed paddle LFCSP The differential input impedance of 200 Ω provides a well-defined package. Performance is specified over the −40°C to +85°C termination. The differential output has a low impedance of ~25 Ω. temperature range.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS PARALLEL AND SERIAL INTERFACE TIMING ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION INPUTS OUTPUTS OUTPUT DIFFERENTIAL OFFSET CORRECTION OUTPUT COMMON-MODE CONTROL GAIN CONTROL INTERFACE APPLICATIONS INFORMATION BASIC CONNECTIONS DIRECT CONVERSION RECEIVER DESIGN QUADRATURE ERRORS AND IMAGE REJECTION LOW FREQUENCY IMD3 PERFORMANCE BASEBAND INTERFACE CHARACTERIZATION SETUPS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
