Datasheet LTC3727, LTC3727-1 (Analog Devices) - 8

LTC3727/LTC3727-1
U U U PI FU CTIO S PLLFLTR (Pin 5/Pin 2):
The phase-locked loop’s lowpass
EXTVCC (Pin 22/Pin 21):
External Power Input to an filter is tied to this pin. Alternatively, this pin can be driven Internal Switch Connected to INTVCC. This switch closes with an AC or DC voltage source to vary the frequency of and supplies VCC power, bypassing the internal low drop- the internal oscillator. out regulator, whenever EXTVCC is higher than 7.3V. See
PLLIN (Pin 6/Pin 3):
External Synchronization Input to EXTVCC connection in Applications section. Do not exceed Phase Detector. This pin is internally terminated to SGND 8.5V on this pin. with 50kΩ. The phase-locked loop will force the rising top
BG1, BG2 (Pins 23, 19/Pins 22, 18):
High Current Gate gate signal of controller 1 to be synchronized with the Drives for Bottom (Synchronous) N-Channel MOSFETs. rising edge of the PLLIN signal. Voltage swing at these pins is from ground to INTVCC.
FCB (Pin 7/Pin 4):
Forced Continuous Control Input. This
VIN (Pin 24/Pin 23):
Main Supply Pin. A bypass capacitor input acts on both controllers and is normally used to should be tied between this pin and the signal ground pin. regulate a secondary winding. Pulling this pin below 0.8V
BOOST1, BOOST2 (Pins 25, 18/Pins 24, 17):
Bootstrapped will force continuous synchronous operation. Do not Supplies to the Top Side Floating Drivers. Capacitors are leave this pin floating. connected between the boost and switch pins and Schot-
ITH1, ITH2 (Pins 8, 11/Pins 5, 8):
Error Amplifier Outputs tky diodes are tied between the boost and INTVCC pins. and Switching Regulator Compensation Points. Each as- Voltage swing at the boost pins is from INTVCC to (VIN + sociated channels’ current comparator trip point increases INTVCC). with this control voltage.
SW1, SW2 (Pins 26, 17/Pins 25, 15):
Switch Node
SGND (Pin 9/Pin 6):
Small Signal Ground. Common Connections to Inductors. Voltage swing at these pins is to both controllers; must be routed separately from from a Schottky diode (external) voltage drop below high current grounds to the common (–) terminals ground to VIN. of the COUT capacitors.
TG1, TG2 (Pins 27, 16/Pins 26, 14):
High Current Gate
3.3VOUT (Pin 10/Pin 7):
Linear Regulator Output. Capable Drives for Top N-Channel MOSFETs. These are the outputs of supplying 10mA DC with peak currents as high as of floating drivers with a voltage swing equal to INTVCC – 50mA. 0.5V superimposed on the switch node voltage SW.
PGND (Pin 20/Pin 19):
Driver Power Ground. Connects to the
PGOOD (Pin 28/Pin 27):
Open-Drain Logic Output. PGOOD sources of bottom (synchronous) N-channel MOSFETs, an- is pulled to ground when the voltage on either VOSENSE pin odes of the Schottky rectifiers and the (–) terminal(s) of CIN. is not within ±7.5% of its set point.
INTVCC (Pin 21/Pin 20):
Output of the Internal 7.5V Linear
Exposed Pad (Pin 33, UH Package):
Signal Ground. Must Low Dropout Regulator and the EXTVCC Switch. The driver be soldered to the PCB ground for electrical contact and and control circuits are powered from this voltage source. optimum thermal performance. Must be decoupled to power ground with a minimum of 4.7μF tantalum or other low ESR capacitor. 3727fc 8