Datasheet LTC3727, LTC3727-1 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | High Efficiency, 2-Phase Synchronous Step-Down Switching Regulators |
| Pages / Page | 32 / 9 — FU CTIO AL DIAGRA. Figure 2. OPERATIO (Refer to Functional Diagram). Main … |
| File Format / Size | PDF / 381 Kb |
| Document Language | English |
FU CTIO AL DIAGRA. Figure 2. OPERATIO (Refer to Functional Diagram). Main Control Loop
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LTC3727/LTC3727-1
U U W FU CTIO AL DIAGRA
PLLIN INTVCC VIN FIN PHASE DET D DUPLICATE FOR SECOND B 50k BOOST CONTROLLER CHANNEL PLLFLTR TG CB CLK1 DROP TOP + RLP OUT CIN OSCILLATOR D CLK2 1 DET C BOT FCB LP SW – 0.86V TOP ON S Q + SWITCH INTVCC V R Q OSENSE1 LOGIC PGOOD BG – BOT + 0.74V C PGND OUT+ B – 0.86V 0.55V + VOUT + – SHDN RSENSE VOSENSE2 – INTV + CC V 0.74V I1 I2 SEC 1.5V + – 7V – – + + – + 0.18μA BINH – + SENSE+ D 50k SEC C + SEC R6 FCB 3mV 0.86V + 4(VFB) SENSE– 50k FCB R5 – SLOPE COMP 25k 25k 3.3V 2.4V OUT 0.8V VOSENSE R2 + V V REF FB – – EA + 0.80V R1 VIN OV + VIN – 0.86V 7.3V + C I C 7.5V TH 1.2μA EXTV – CC LDO REG SHDN RUN C R RST SOFT C2 C INTVCC 6V 4(VFB) START 7.5V + RUN/SS SGND INTERNAL SUPPLY CSS 3727 F02
Figure 2 U OPERATIO (Refer to Functional Diagram) Main Control Loop
the voltage feedback signal, which is compared to the internal reference voltage by the EA. When the load current The LTC3727/LTC3727-1 use a constant frequency, cur- increases, it causes a slight decrease in V rent mode step-down architecture with the two controller OSENSE relative to the 0.8V reference, which in turn causes the I channels operating 180 degrees out of phase. During TH voltage to increase until the average inductor current matches the normal operation, each top MOSFET is turned on when the new load current. After the top MOSFET has turned off, the clock for that channel sets the RS latch, and turned off bottom MOSFET is turned on until either the inductor when the main current comparator, I1, resets the RS latch. current starts to reverse, as indicated by current compara- The peak inductor current at which I1 resets the RS latch tor I is controlled by the voltage on the I 2, or the beginning of the next cycle. TH pin, which is the output of each error amplifier EA. The VOSENSE pin receives 3727fc 9
U U W FU CTIO AL DIAGRA
PLLIN INTVCC VIN FIN PHASE DET D DUPLICATE FOR SECOND B 50k BOOST CONTROLLER CHANNEL PLLFLTR TG CB CLK1 DROP TOP + RLP OUT CIN OSCILLATOR D CLK2 1 DET C BOT FCB LP SW – 0.86V TOP ON S Q + SWITCH INTVCC V R Q OSENSE1 LOGIC PGOOD BG – BOT + 0.74V C PGND OUT+ B – 0.86V 0.55V + VOUT + – SHDN RSENSE VOSENSE2 – INTV + CC V 0.74V I1 I2 SEC 1.5V + – 7V – – + + – + 0.18μA BINH – + SENSE+ D 50k SEC C + SEC R6 FCB 3mV 0.86V + 4(VFB) SENSE– 50k FCB R5 – SLOPE COMP 25k 25k 3.3V 2.4V OUT 0.8V VOSENSE R2 + V V REF FB – – EA + 0.80V R1 VIN OV + VIN – 0.86V 7.3V + C I C 7.5V TH 1.2μA EXTV – CC LDO REG SHDN RUN C R RST SOFT C2 C INTVCC 6V 4(VFB) START 7.5V + RUN/SS SGND INTERNAL SUPPLY CSS 3727 F02
Figure 2 U OPERATIO (Refer to Functional Diagram) Main Control Loop
the voltage feedback signal, which is compared to the internal reference voltage by the EA. When the load current The LTC3727/LTC3727-1 use a constant frequency, cur- increases, it causes a slight decrease in V rent mode step-down architecture with the two controller OSENSE relative to the 0.8V reference, which in turn causes the I channels operating 180 degrees out of phase. During TH voltage to increase until the average inductor current matches the normal operation, each top MOSFET is turned on when the new load current. After the top MOSFET has turned off, the clock for that channel sets the RS latch, and turned off bottom MOSFET is turned on until either the inductor when the main current comparator, I1, resets the RS latch. current starts to reverse, as indicated by current compara- The peak inductor current at which I1 resets the RS latch tor I is controlled by the voltage on the I 2, or the beginning of the next cycle. TH pin, which is the output of each error amplifier EA. The VOSENSE pin receives 3727fc 9
