Datasheet LT8390 (Analog Devices) - 23
| Manufacturer | Analog Devices |
| Description | 60V Synchronous 4-Switch Buck-Boost Controller with Spread Spectrum |
| Pages / Page | 32 / 23 — APPLICATIONS INFORMATION. Table 2. V(ISP-ISN) Threshold vs VCTRL. (13a). … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
APPLICATIONS INFORMATION. Table 2. V(ISP-ISN) Threshold vs VCTRL. (13a). (13b). Figure 13. Programming Input Current Limit. (14a)
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APPLICATIONS INFORMATION
When VCTRL is between 1.15V and 1.35V the current limit RIS FROM POWER TO DRAIN OF varies with VCTRL, but departs from the equation above INPUT + SWITCH A by an increasing amount as VCTRL increases. Ultimately, when VCTRL is larger than 1.35V, the current limit no longer varies. The typical V(ISP-ISN) threshold vs VCTRL is listed ISP ISN in Table 2. LT8390
Table 2. V(ISP-ISN) Threshold vs VCTRL
8390 F13a VCTRL (V) V(ISP-ISN) (mV)
(13a)
1.15 90 R 1.20 94.5 IS FROM POWER TO DRAIN OF INPUT + SWITCH A 1.25 98 RF RF 1.30 99.5 CF 1.35 100 ISP ISN When V LT8390 CTRL is larger than 1.35V, the current threshold is regulated to: 8390 F13b
(13b)
IIS(MAX) = 100mV RIS
Figure 13. Programming Input Current Limit
The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the output load, or with a resistor divider to VIN to reduce RIS FROM DRAIN OF TO SYSTEM output power and switching current when VIN is low. SWITCH D + OUTPUT The presence of a time varying differential voltage ripple signal across the ISP and ISN pins at the switching ISP ISN frequency is expected. If the current sense resistor RIS LT8390 is placed between power input and input bulk capacitor (Figure 13a), or between output bulk capacitor and system 8390 F14a output (Figure 14a), a filter is typically not necessary. If
(14a)
the RIS is placed between input bulk capacitor and input decoupling capacitor (Figure 13b), or between output RIS FROM DRAIN OF TO SYSTEM decoupling capacitor and output bulk capacitor (Figure SWITCH D OUTPUT + 14b), a low pass filter formed by RF and CF is recom- RF RF C mended to reduce the current ripple and stabilize the F current loop. Since the bias currents of the ISP and ISN pins are matched, no offset is introduced by RF. If input ISP ISN or output current limit is not used, the ISP and ISN pins LT8390 should be shorted to VIN, VOUT, or ground. 8390 F14b
(14b) Figure 14. Programming Output Current Limit
8390fa For more information www.linear.com/LT8390 23 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
APPLICATIONS INFORMATION
When VCTRL is between 1.15V and 1.35V the current limit RIS FROM POWER TO DRAIN OF varies with VCTRL, but departs from the equation above INPUT + SWITCH A by an increasing amount as VCTRL increases. Ultimately, when VCTRL is larger than 1.35V, the current limit no longer varies. The typical V(ISP-ISN) threshold vs VCTRL is listed ISP ISN in Table 2. LT8390
Table 2. V(ISP-ISN) Threshold vs VCTRL
8390 F13a VCTRL (V) V(ISP-ISN) (mV)
(13a)
1.15 90 R 1.20 94.5 IS FROM POWER TO DRAIN OF INPUT + SWITCH A 1.25 98 RF RF 1.30 99.5 CF 1.35 100 ISP ISN When V LT8390 CTRL is larger than 1.35V, the current threshold is regulated to: 8390 F13b
(13b)
IIS(MAX) = 100mV RIS
Figure 13. Programming Input Current Limit
The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the output load, or with a resistor divider to VIN to reduce RIS FROM DRAIN OF TO SYSTEM output power and switching current when VIN is low. SWITCH D + OUTPUT The presence of a time varying differential voltage ripple signal across the ISP and ISN pins at the switching ISP ISN frequency is expected. If the current sense resistor RIS LT8390 is placed between power input and input bulk capacitor (Figure 13a), or between output bulk capacitor and system 8390 F14a output (Figure 14a), a filter is typically not necessary. If
(14a)
the RIS is placed between input bulk capacitor and input decoupling capacitor (Figure 13b), or between output RIS FROM DRAIN OF TO SYSTEM decoupling capacitor and output bulk capacitor (Figure SWITCH D OUTPUT + 14b), a low pass filter formed by RF and CF is recom- RF RF C mended to reduce the current ripple and stabilize the F current loop. Since the bias currents of the ISP and ISN pins are matched, no offset is introduced by RF. If input ISP ISN or output current limit is not used, the ISP and ISN pins LT8390 should be shorted to VIN, VOUT, or ground. 8390 F14b
(14b) Figure 14. Programming Output Current Limit
8390fa For more information www.linear.com/LT8390 23 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts