Datasheet HMC628LP4, 628LP4E (Analog Devices)

ManufacturerAnalog Devices
DescriptionBiCMOS 5-Bit Digital Variable Gain Amp. SMT, 50 - 800 MHz
Pages / Page14 / 1 — HMC628LP4 / 628LP4E. BiCMOS MMIC 5-Bit DIGITAL. VARIABLE GAIN AMPLIFIER, …
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HMC628LP4 / 628LP4E. BiCMOS MMIC 5-Bit DIGITAL. VARIABLE GAIN AMPLIFIER, 50 - 800 MHz. Typical Applications. Features

Datasheet HMC628LP4, 628LP4E Analog Devices

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HMC628LP4 / 628LP4E
v07.0410
BiCMOS MMIC 5-Bit DIGITAL VARIABLE GAIN AMPLIFIER, 50 - 800 MHz Typical Applications Features
The HMC628LP4(E) is ideal for: TTL/CMOS compatible serial, parallel or latched parallel control interface • Cellular/3G Infrastructure High Output IP3: +35 dBm (At all gain settings) • WiBro / WiMAX / 4G Wide Gain Control Range: 23 dB • Microwave Radio & VSAT Power-up State Selection • Test Equipment and Sensors 24 Lead 4x4 mm SMT Package: 16 mm2 • IF & RF Applications Excellent State & Step Accuracy (±0.05 dB)
Functional Diagram General Description
The HMC628LP4(E) is a digitally controlled variable 12 gain amplifi er which operates from 50 to 800 MHz, and can be programmed to provide anywhere from 8 dB attenuation, to 15 dB of gain, in 1.0 dB steps. T The HMC628LP4(E) delivers noise fi gure of 5 dB in its maximum gain state, with output IP3 of up to +35 dBm in any state. The dual mode control interface is CMOS/ TTL compatible, and accepts either a three wire serial L - SM input or a 5 bit parallel word. The HMC628LP4(E) also A features a user selectable power up state and a serial IT output port for cascading other Hittite serial controlled components. The HMC628LP4(E) is housed in a IG RoHS compliant 4x4 mm QFN leadless package, and is available in three evaluation board confi gurations, - D depending on the application frequency. S R IE
Electrical Specifi cations, T = +25° C, 50 Ohm System, Vdd= +5V A
IF 50 - 250 250 - 500 500 - 800 MHz L Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Units P Gain (Maximum Gain State) 13 15 12.8 14 10.5 13 dB M Gain Control Range 23 23 23 dB A Input Return Loss 12 10 10 dB Output Return Loss 10 12.5 9 dB IN ± (0.1 + 1% of Gain ± (0.4 + 2% of Gain ± (0.4 + 4% of Gain A Gain Accuracy: (Referenced to Maximum Gain State) dB Setting )Max Setting )Max Setting )Max G Output Power for 1dB Compression 19 19.5 16 18 14 18 dBm E Output Third Order Intercept Point 35 [1] 33 [2] 32 [3] dBm L Output Second Order Intercept Point 46 [1] 54 [2] 55 [3] dBm B 2nd 46 55 62 dBc Harmonics 3rd 69 75 83 dBc IA Switching Characteristics tRISE, tFALL (10 / 90% RF) 11 ns R tON, tOFF ( Latch Enable to 10 / 90% RF) 18 ns A Noise Figure 5 6 6.5 dB V Su pply Cu rrent (Idd) 65 85 65 85 65 85 mA [1] Two-Tone Output Power @ 5 dBm [2] Two-Tone Output Power @ 2 dBm [3] Two-Tone Output Power @ 0 dBm Inf F or o m r pr ation ifc ur e, de nished lbiv y e Anry alo a g n D d to p evices is la beclie o eved rde to b r e sa: H ccur iattti e tae M nd reliicr abl ow e. H a o v wee C ver, o n rp o o F roar tiporin c ,e 2 , 0 de A liv lepha R ry, an o d t ad, C o plac h e eolm rdesrfo s: rd, MA 01 Analog Devi 8 c 2 e 4 s, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No
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