Datasheet HT68F001, HT68F0012 (Holtek) - 16

ManufacturerHoltek
DescriptionCost-Effective Flash MCU
Pages / Page56 / 16 — HT68F001/HT68F0012. Cost-Effective Flash MCU. Holtek Writer Pins. MCU …
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HT68F001/HT68F0012. Cost-Effective Flash MCU. Holtek Writer Pins. MCU Programming Pins. Pin Description

HT68F001/HT68F0012 Cost-Effective Flash MCU Holtek Writer Pins MCU Programming Pins Pin Description

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HT68F001/HT68F0012 HT68F001/HT68F0012 Cost-Effective Flash MCU Cost-Effective Flash MCU
The Holtek Flash MCU to Writer Programming Pin correspondence table is as follows:
Holtek Writer Pins MCU Programming Pins Pin Description
ICPD� P�0 P�og�amming Se�ia� Data/�dd�ess ICPCK P�2 P�og�amming C�ock VDD VDD Powe� Su���y VSS VSS G�ound The Program Memory can be programmed serially in-circuit using this 4-wire interface. Data is downloaded and uploaded serially on a single pin with an additional line for the clock. Two additional lines are required for the power supply. The technical details regarding the in-circuit programming of the devices are beyond the scope of this document and will be supplied in supplementary literature. During the programming process, the user can take care of the ICPDA and ICPCK pins for data and clock programming purposes to ensure that no other outputs are connected to these two pins. W�ite� Connecto� MCU P�og�amming Signa�s Pins W�ite�_VDD VDD ICPD� P�0 ICPCK P�2 W�ite�_VSS VSS * * To othe� Ci�cuit Note: * may be resistor or capacitor. The resistance of * must be greater than 1k٠or the capacitance of * must be less than 1nF.
On-Chip Debug Support – OCDS
There is an EV chip named HT68V001 or HT68V0012 which is used to emulate the real MCU device named HT68F001 or HT68F0012. The EV chip device also provides an “On-Chip Debug” function to debug the real MCU device during the development process. The EV chip and the real MCU device are almost functionally compatible except for “On-Chip Debug” function. Users can use the EV chip device to emulate the real chip device behavior by connecting the OCDSDA and OCDSCK pins to the Holtek HT-IDE development tools. The OCDSDA pin is the OCDS Data/ Address input/output pin while the OCDSCK pin is the OCDS clock input pin. When users use the EV chip for debugging, other functions which are shared with the OCDSDA and OCDSCK pins in the device will have no effect in the EV chip. For more detailed OCDS information, refer to the corresponding document named “Holtek e-Link for 8-bit MCU OCDS User’s Guide”.
Holtek e-Link Pins EV Chip Pins Pin Description
OCDSD� OCDSD� On-chi� Debug Su��o�t Data/�dd�ess in�ut/out�ut OCDSCK OCDSCK On-chi� Debug Su��o�t C�ock in�ut VDD VDD Powe� Su���y VSS VSS G�ound Rev. 1.20 16 ���i� 1�� 201� Rev. 1.20 1� ���i� 1�� 201� Document Outline Features CPU Features Peripheral Features General Description Selection Table Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics Operating Voltage Characteristics Operating Current Characteristics Standby Current Characteristics A.C. Characteristics Low Speed Internal Oscillator Characteristics (LIRC) – HT68F001 Low Speed Internal Oscillator Characteristics (IRC) – HT68F0012 System Start Up Time Characteristics Input/Output Characteristics Power on Reset Characteristics System Architecture Clocking and Pipelining Program Counter Stack Arithmetic and Logic Unit – ALU Flash Program Memory Structure Special Vectors Look-up Table Table Program Example In Circuit Programming – ICP On-Chip Debug Support – OCDS Data Memory Structure General Purpose Data Memory Special Purpose Data Memory Special Function Register Description Indirect Addressing Registers – IAR0 Memory Pointers – MP0 Accumulator – ACC Program Counter Low Register – PCL Look-up Table Registers – TBLP Status Register – STATUS Oscillators Oscillator Overview System Clock Configurations Internal 32kHz Oscillator – LIRC Internal 512kHz Oscillator – IRC Operating Modes and System Clocks System Clocks System Operation Modes Standby Current Considerations Wake-up Watchdog Timer Watchdog Timer Clock Source Watchdog Timer Control Register Watchdog Timer Operation Reset and Initialisation Reset Functions Reset Initial Conditions Input/Output Ports Pull-high Resistors Port A Wake-up I/O Port Control Registers I/O Pin Structures Programming Considerations Timer/Event Counter Timer/Event Counter Registers – TMR, TMRC Timer Mode Event Counter Mode Pulse Width Capture Mode Interrupts Interrupt Registers Interrupt Operation Time Base Interrupt Interrupt Wake-up Function Programming Considerations Application Circuits Instruction Set Introduction Instruction Timing Moving and Transferring Data Arithmetic Operations Logical and Rotate Operation Branches and Control Transfer Bit Operations Table Read Operations Other Operations Instruction Set Summary Table Conventions Instruction Definition Package Information 8-pin SOP (150mil) Outline Dimensions