Datasheet SPD50P03L G (Infineon) - 3
| Manufacturer | Infineon |
| Description | OptiMOS -P Power-Transistor |
| Pages / Page | 9 / 3 — SPD50P03L G. Parameter. Symbol Conditions. Values. Unit. min. typ. max. … |
| Revision | 01_09 |
| File Format / Size | PDF / 395 Kb |
| Document Language | English |
SPD50P03L G. Parameter. Symbol Conditions. Values. Unit. min. typ. max. Dynamic characteristics. Reverse Diode
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Text Version of Document
SPD50P03L G Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics
Input capacitance C iss - 4590 6880 pF V Output capacitance C GS=0 V, oss - 1220 1830 V DS=-25 V, f =1 MHz Reverse transfer capacitance C rss - 1000 1500 Turn-on delay time t d(on) - 14.8 22 ns Rise time t V r DD=-15 V, - 21.7 32 V GS=-10 V, I D=-1 A, Turn-off delay time t d(off) R - 139 208 G=6 Ω Fall time t f - 104 156 Gate Charge Characteristics3) Gate to source charge Q gs - -14 -19 nC V DD=-24 V, I D=-50 A Gate to drain charge Q gd - -35 -53 V Gate charge total Q DD=-24 V, ID=-50 A, g - -95 -126 VGS=0 to -10 V Gate plateau voltage V plateau VDD=-24 V, ID=-50 A - -3.0 - V
Reverse Diode
Diode continous forward current I S - - -50 A T C=25 °C Diode pulse current I S,pulse - - -200 V Diode forward voltage V GS=0 V, I F=50 A, SD - -1 -1.65 V T j=25 °C V Reverse recovery time t R=-15 V, I F=|I S|, rr - 38 47 ns di F/dt =100 A/µs Reverse recovery charge Q rr - 46 57 nC 3) See figure 16 for gate charge parameter definition Rev. 1.9 page 3 2012-09-13 Document Outline Untitled
Input capacitance C iss - 4590 6880 pF V Output capacitance C GS=0 V, oss - 1220 1830 V DS=-25 V, f =1 MHz Reverse transfer capacitance C rss - 1000 1500 Turn-on delay time t d(on) - 14.8 22 ns Rise time t V r DD=-15 V, - 21.7 32 V GS=-10 V, I D=-1 A, Turn-off delay time t d(off) R - 139 208 G=6 Ω Fall time t f - 104 156 Gate Charge Characteristics3) Gate to source charge Q gs - -14 -19 nC V DD=-24 V, I D=-50 A Gate to drain charge Q gd - -35 -53 V Gate charge total Q DD=-24 V, ID=-50 A, g - -95 -126 VGS=0 to -10 V Gate plateau voltage V plateau VDD=-24 V, ID=-50 A - -3.0 - V
Reverse Diode
Diode continous forward current I S - - -50 A T C=25 °C Diode pulse current I S,pulse - - -200 V Diode forward voltage V GS=0 V, I F=50 A, SD - -1 -1.65 V T j=25 °C V Reverse recovery time t R=-15 V, I F=|I S|, rr - 38 47 ns di F/dt =100 A/µs Reverse recovery charge Q rr - 46 57 nC 3) See figure 16 for gate charge parameter definition Rev. 1.9 page 3 2012-09-13 Document Outline Untitled
