Datasheet ATA663431, ATA663454 (Microchip) - 10

ManufacturerMicrochip
DescriptionLIN SBC including LIN Transceiver, Voltage Regulator, Window Watchdog and High-Side Switch
Pages / Page40 / 10 — ATA663431/54. FIGURE 1-7:. LOCAL WAKE-UP VIA WKIN PIN FROM SILENT MODE. …
File Format / SizePDF / 1.1 Mb
Document LanguageEnglish

ATA663431/54. FIGURE 1-7:. LOCAL WAKE-UP VIA WKIN PIN FROM SILENT MODE. Fail-safe Mode. Normal Mode. Table 1-3. TABLE 1-3:

ATA663431/54 FIGURE 1-7: LOCAL WAKE-UP VIA WKIN PIN FROM SILENT MODE Fail-safe Mode Normal Mode Table 1-3 TABLE 1-3:

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ATA663431/54 FIGURE 1-7: LOCAL WAKE-UP VIA WKIN PIN FROM SILENT MODE Fail-safe Mode Normal Mode
WKin State change RXD High TXD Low (strong pull-down) Wake filtering time tWKin VCC EN High EN NRES Watchdog Watchdog off Start watchdog lead time td 1.3.3 LOCAL WAKE-UP VIA CL15 signal at CL15 has to be switched to low > 10 μs before the rising edge at CL15 starts a new local wake-up A voltage on pin CL15 above VCL15H for at least tdbCL15 results in a local wake-up request. The device switches request. to Fail-Safe mode. The internal slave termination 1.3.4 WAKE-UP SOURCE RECOGNITION resistor is switched on. The local wake-up request is indicated by a low level at the TXD pin to generate an The device can distinguish between different wake-up interrupt for the microcontroller. Even when the CL15 sources (see
Table 1-3
). The wake-up source can be pin is high, it is possible to switch to Silent mode or read on the TXD and RXD pin in Fail-Safe mode. Sleep mode via the EN pin. In this case, the wake-up These flags are immediately reset if the microcontroller sets the EN pin to high and the IC is in Normal mode.
TABLE 1-3: SIGNALING IN FAIL-SAFE MODE Fail-Safe Sources TXD RXD
LIN wake-up (LIN pin) Low Low Local wake-up (WKin pin or CL15 pin) Low High VVS_th_N_F_down (battery) undervoltage detection (VVS < 3.9V) High Low DS50002820B-page 10

 2018 Microchip Technology Inc. Document Outline Features General Description Package Types Block Diagram 1.0 Functional Description 1.1 Physical Layer Compatibility 1.2 Operating Modes FIGURE 1-1: Operating Modes TABLE 1-1: Operating Modes (Mode Pin Is Always Low) 1.2.1 Normal Mode 1.2.2 Silent Mode FIGURE 1-2: Switching to Silent mode 1.2.3 Sleep Mode FIGURE 1-3: Switching to Sleep Mode 1.2.4 Fail-Safe mode TABLE 1-2: Signaling in Fail-safe Mode 1.3 Wake-up Scenarios from Silent Mode or Sleep Mode 1.3.1 Remote Wake-up via LIN Bus 1.3.1.1 Remote Wake-up from Silent Mode FIGURE 1-4: LIN Wake-up from Silent Mode 1.3.1.2 Remote Wake-up from Sleep Mode FIGURE 1-5: LIN Wake-up from Sleep Mode 1.3.2 Local Wake-up via WKin Pin FIGURE 1-6: Local Wake-up via WKin pin from Sleep Mode FIGURE 1-7: Local Wake-up via WKin pin from Silent Mode 1.3.3 Local Wake-up via CL15 1.3.4 Wake-up Source Recognition TABLE 1-3: Signaling in Fail-Safe Mode 1.4 Behavior under Low Supply Voltage Conditions FIGURE 1-8: VCC and NRES versus VS (Ramp-up) for ATA663431 FIGURE 1-9: VCC and NRES versus VS (Ramp-down) for ATA663431 FIGURE 1-10: VCC and NRES versus VS (Ramp-up) for ATA663454 FIGURE 1-11: VCC and NRES versus VS (Ramp-Down) for ATA663454 1.5 Voltage Regulator FIGURE 1-12: VCC Voltage Regulator: Supply Voltage Ramp-up and Ramp-down FIGURE 1-13: Power Dissipation: Safe Operating Area: Regulator’s Output Current IVCC versus Supply Voltage VVS at Different Ambient Temperatures (RthvJA = 45 K/W assumed) 1.6 Watchdog FIGURE 1-14: Limp Home (LH) State Diagram 1.6.1 Typical Timing Sequence with RWDOSC = 51 kΩ EQUATION 1-1: FIGURE 1-15: Timing Sequence with RWDOSC = 51 kΩ 1.6.2 Worst-Case Calculation with RWDOSC = 51 kΩ EQUATION 1-2: TABLE 1-4: Typical Watchdog Timings 1.7 Pin Descriptions TABLE 1-5: Pin Description 1.7.1 Bus Data Output Pin (RXD) 1.7.2 Enable Input Pin (EN) 1.7.3 Undervoltage Reset Output Pin (NRES) 1.7.4 Bus Data Input/Output (TXD) 1.7.5 NTRIG Input Pin 1.7.6 Mode Input Pin (MODE) 1.7.7 WDOSC Output Pin 1.7.8 High-side Switch Pins (HSout, HSin) 1.7.9 Limp Home Watchdog Failure Output (LH) 1.7.10 CL15 Pin 1.7.11 Wake Input Pin (WKin) 1.7.12 Ground Pin (GND) 1.7.13 Bus Pin (LIN) 1.7.14 Supply Pin (VS) 1.7.15 Voltage Regulator Output Pin (VCC) Typical Application Circuit 2.0 Electrical Characteristics 2.1 Absolute Maximum Ratings† Electrical Characteristics FIGURE 2-1: Definition of Bus timing Characteristics Temperature Specifications 3.0 Packaging Information 3.1 Package Marking Information LIN SBC including LIN Transceiver, Voltage Regulator, Window Watchdog and High-Side Switch Appendix A: Revision History Revision A (November 2018) Revision B (November 2018) Product Identification System AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Dallas Detroit Houston, TX Indianapolis Los Angeles Raleigh, NC New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Guangzhou China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Suzhou China - Wuhan China - Xian China - Xiamen China - Zhuhai ASIA/PACIFIC India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok Vietnam - Ho Chi Minh EUROPE Austria - Wels Denmark - Copenhagen Finland - Espoo France - Paris Germany - Garching Germany - Haan Germany - Heilbronn Germany - Karlsruhe Germany - Munich Germany - Rosenheim Israel - Ra’anana Italy - Milan Italy - Padova Netherlands - Drunen Norway - Trondheim Poland - Warsaw Romania - Bucharest Spain - Madrid Sweden - Gothenberg Sweden - Stockholm UK - Wokingham Worldwide Sales and Service
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