Datasheet 2ED2184 (4) S06F (J) (Infineon) - 9
| Manufacturer | Infineon |
| Description | 650 V half-bridge gate driver with integrated bootstrap diode |
| Pages / Page | 25 / 9 — 2ED2184. (4). S06F. (J). 650. V. half-bridge. gate. driver. with. … |
| Revision | 02_01 |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
2ED2184. (4). S06F. (J). 650. V. half-bridge. gate. driver. with. integrated. bootstrap. diode. 5Application. information. and. additional. details
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2ED2184 (4) S06F (J) 650 V half-bridge gate driver with integrated bootstrap diode 5
Application information and additional details 5.1
IGBT / MOSFET gate drive The 2ED2184(4)S06F(J) HVIC is designed to drive MOSFET or IGBT power devices. Figures 4 and 5 illustrate several parameters associated with the gate drive functionality of the HVIC. The output current of the HVIC, used to drive the gate of the power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VHO for the high-side power switch and VLO for the low-side power switch; this parameter is sometimes generical y cal ed VOUT and in this case does not differentiate between the high-side or low-side output voltage. VB VB (or VCC) (or VCC) IO+ HO HO (or LO) + (or LO) I V O- HO (or VLO) V - S VS (or COM) (or COM) Figure 4
HVIC Sourcing current Figure 5
HVIC Sinking current 5.2
Switching and timing relationships The relationships between the input and output signals of the 2ED2184 (4) S06F (J) are illustrated below in Figure 6 and Figure 7. From these figures, we can see the definitions of several timing parameters (i.e. tON, tOFF, tR, and tF) associated with this device. Figure 6
Switching timing diagram Figure 7
Input/output logic diagram Datasheet 9 of 25 V 2.10 www.infineon.com/soi 2019-09-12 Document Outline Features Product summary Product validation Description 1 Table of contents 2 Block diagram 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Electrical parameters 4.1 Absolute maximum ratings 4.2 Recommended operating conditions 4.3 Static electrical characteristics 4.4 Dynamic electrical characteristics 5 Application information and additional details 5.1 IGBT / MOSFET gate drive 5.2 Switching and timing relationships 5.3 Deadtime and matched propagation delays 5.4 Input logic compatibility 5.5 Undervoltage lockout 5.6 Shutdown Input 5.7 Bootstrap diode 5.8 Calculating the bootstrap capacitance CBS 5.9 Tolerant to negative tranisents on input pins 5.10 Negative voltage transient tolerance of VS pin 5.11 NTSOA – Negative Transient Safe Operating Area 5.12 Higher headroom for input to output signal transmission with logic operation upto -11 V 5.13 Maximum switching frequency 5.14 PCB layout tips 6 Qualification information0F 7 Related products 8 Package details 9 Part marking information 10 Additional documentation and resources 10.1 Infineon online forum resources 11 Revision history
Application information and additional details 5.1
IGBT / MOSFET gate drive The 2ED2184(4)S06F(J) HVIC is designed to drive MOSFET or IGBT power devices. Figures 4 and 5 illustrate several parameters associated with the gate drive functionality of the HVIC. The output current of the HVIC, used to drive the gate of the power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VHO for the high-side power switch and VLO for the low-side power switch; this parameter is sometimes generical y cal ed VOUT and in this case does not differentiate between the high-side or low-side output voltage. VB VB (or VCC) (or VCC) IO+ HO HO (or LO) + (or LO) I V O- HO (or VLO) V - S VS (or COM) (or COM) Figure 4
HVIC Sourcing current Figure 5
HVIC Sinking current 5.2
Switching and timing relationships The relationships between the input and output signals of the 2ED2184 (4) S06F (J) are illustrated below in Figure 6 and Figure 7. From these figures, we can see the definitions of several timing parameters (i.e. tON, tOFF, tR, and tF) associated with this device. Figure 6
Switching timing diagram Figure 7
Input/output logic diagram Datasheet 9 of 25 V 2.10 www.infineon.com/soi 2019-09-12 Document Outline Features Product summary Product validation Description 1 Table of contents 2 Block diagram 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Electrical parameters 4.1 Absolute maximum ratings 4.2 Recommended operating conditions 4.3 Static electrical characteristics 4.4 Dynamic electrical characteristics 5 Application information and additional details 5.1 IGBT / MOSFET gate drive 5.2 Switching and timing relationships 5.3 Deadtime and matched propagation delays 5.4 Input logic compatibility 5.5 Undervoltage lockout 5.6 Shutdown Input 5.7 Bootstrap diode 5.8 Calculating the bootstrap capacitance CBS 5.9 Tolerant to negative tranisents on input pins 5.10 Negative voltage transient tolerance of VS pin 5.11 NTSOA – Negative Transient Safe Operating Area 5.12 Higher headroom for input to output signal transmission with logic operation upto -11 V 5.13 Maximum switching frequency 5.14 PCB layout tips 6 Qualification information0F 7 Related products 8 Package details 9 Part marking information 10 Additional documentation and resources 10.1 Infineon online forum resources 11 Revision history
