Datasheet SiZF300DT (Vishay) - 2
| Manufacturer | Vishay |
| Description | Dual N-Channel 30 V (D-S) MOSFET with Schottky Diode |
| Pages / Page | 13 / 2 — SiZF300DT. SPECIFICATIONS. PARAMETER SYMBOL. TEST. CONDITIONS. MIN. TYP. … |
| File Format / Size | PDF / 265 Kb |
| Document Language | English |
SiZF300DT. SPECIFICATIONS. PARAMETER SYMBOL. TEST. CONDITIONS. MIN. TYP. MAX. UNIT. Static. Dynamic a
Model Line for this Datasheet
Text Version of Document
SiZF300DT
www.vishay.com Vishay Siliconix
SPECIFICATIONS
(TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static
Ch-1 30 - - Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA Ch-2 30 - - V Ch-1 1.1 - 2.2 Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA Ch-2 1.0 - 2.2 V Gate-source leakage I DS = 0 V, VGS = +20 V, -16 V Ch-1 - - ± 100 GSS nA VDS = 0 V, VGS = +16 V, -12 V Ch-2 - - ± 100 Ch-1 - - 1 VDS = 30 V, VGS = 0 V Ch-2 - 30 350 Zero Gate voltage drain current IDSS μA Ch-1 - - 5 VDS = 30 V, VGS = 0 V, TJ = 55 °C Ch-2 - 150 3000 Ch-1 10 - - On-state drain current b I D(on) VDS 5 V, VGS = 10 V A Ch-2 10 - - VGS = 10 V, ID = 10 A Ch-1 - 0.00330 0.00450 V Drain-source on-state resistance b R GS = 10 V, ID = 10 A Ch-2 - 0.00160 0.00184 DS(on) VGS = 4.5 V, ID = 7 A Ch-1 - 0.00490 0.00700 VGS = 4.5 V, ID = 7 A Ch-2 - 0.00210 0.00257 V Forward transconductance b g DS = 10 V, ID = 20 A Ch-1 - 60 - fs S VDS = 10 V, ID = 20 A Ch-2 90 -
Dynamic a
Ch-1 - 1100 - Input capacitance Ciss Ch-2 - 3150 - Channel-1 V Ch-1 - 530 - DS = 15 V, VGS = 0 V, f = 1 MHz Output capacitance Coss pF Ch-2 - 1550 - Ch-1 - 40 - Reverse transfer capacitance Crss Channel-2 Ch-2 - 170 - VDS = 15 V, VGS = 0 V, f = 1 MHz Ch-1 - 0.036 0.072 Crss/Ciss ratio Ch-2 0.054 0.108 Ch-1 - 14.4 22 VDS = 15 V, VGS = 10 V, ID = 10 A Ch-2 - 41 62 Total gate charge Qg Ch-1 6.9 10.5 Channel-1 V Ch-2 - 19.4 29 DS = 15 V, VGS = 4.5 V, ID = 10 A Ch-1 - 3.1 - Gate-source charge Qgs nC Ch-2 - 7.1 - Channel-2 Ch-1 - 1.5 - Gate-drain charge Qgd VDS = 15 V, VGS = 4.5 V, ID = 10 A Ch-2 - 3.8 - Ch-1 - 13 - Output charge Qoss VDS = 15 V, VGS = 0 V Ch-2 - 40 - Ch-1 0.14 0.7 1.4 Gate resistance R g f = 1 MHz Ch-2 0.12 0.62 1.2 Ch-1 - 17 35 Turn-on delay time td(on) Channel-1 Ch-2 - 25 50 VDD = 15 V, RL = 3 I Ch-1 - 40 80 Rise time t D 5 A, VGEN = 4.5 V, Rg = 1 r Ch-2 - 53 110 Ch-1 - 23 45 Turn-off delay time td(off) Channel-2 Ch-2 - 30 60 VDD = 15 V, RL = 3 Ch-1 - 7 15 I Fall time t D 5 A, VGEN = 4.5 V, Rg = 1 f Ch-2 - 12 25 ns Ch-1 - 11 20 Turn-on delay time td(on) Channel-1 Ch-2 - 13 25 VDD = 15 V, RL = 3 I Ch-1 - 5 10 D 5 A, VGEN = 10 V, Rg = 1 Rise time tr Ch-2 - 20 40 Ch-1 - 23 45 Turn-off delay time td(off) Channel-2 Ch-2 - 32 65 VDD = 15 V, RL = 3 Ch-1 - 5 10 I Fall time t D 5 A, VGEN = 10 V, Rg = 1 f Ch-2 - 6 15 S18-0479-Rev. A, 30-Apr-2018
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Document Number: 76288 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Siliconix
SPECIFICATIONS
(TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static
Ch-1 30 - - Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA Ch-2 30 - - V Ch-1 1.1 - 2.2 Gate-source threshold voltage VGS(th) VDS = VGS, ID = 250 μA Ch-2 1.0 - 2.2 V Gate-source leakage I DS = 0 V, VGS = +20 V, -16 V Ch-1 - - ± 100 GSS nA VDS = 0 V, VGS = +16 V, -12 V Ch-2 - - ± 100 Ch-1 - - 1 VDS = 30 V, VGS = 0 V Ch-2 - 30 350 Zero Gate voltage drain current IDSS μA Ch-1 - - 5 VDS = 30 V, VGS = 0 V, TJ = 55 °C Ch-2 - 150 3000 Ch-1 10 - - On-state drain current b I D(on) VDS 5 V, VGS = 10 V A Ch-2 10 - - VGS = 10 V, ID = 10 A Ch-1 - 0.00330 0.00450 V Drain-source on-state resistance b R GS = 10 V, ID = 10 A Ch-2 - 0.00160 0.00184 DS(on) VGS = 4.5 V, ID = 7 A Ch-1 - 0.00490 0.00700 VGS = 4.5 V, ID = 7 A Ch-2 - 0.00210 0.00257 V Forward transconductance b g DS = 10 V, ID = 20 A Ch-1 - 60 - fs S VDS = 10 V, ID = 20 A Ch-2 90 -
Dynamic a
Ch-1 - 1100 - Input capacitance Ciss Ch-2 - 3150 - Channel-1 V Ch-1 - 530 - DS = 15 V, VGS = 0 V, f = 1 MHz Output capacitance Coss pF Ch-2 - 1550 - Ch-1 - 40 - Reverse transfer capacitance Crss Channel-2 Ch-2 - 170 - VDS = 15 V, VGS = 0 V, f = 1 MHz Ch-1 - 0.036 0.072 Crss/Ciss ratio Ch-2 0.054 0.108 Ch-1 - 14.4 22 VDS = 15 V, VGS = 10 V, ID = 10 A Ch-2 - 41 62 Total gate charge Qg Ch-1 6.9 10.5 Channel-1 V Ch-2 - 19.4 29 DS = 15 V, VGS = 4.5 V, ID = 10 A Ch-1 - 3.1 - Gate-source charge Qgs nC Ch-2 - 7.1 - Channel-2 Ch-1 - 1.5 - Gate-drain charge Qgd VDS = 15 V, VGS = 4.5 V, ID = 10 A Ch-2 - 3.8 - Ch-1 - 13 - Output charge Qoss VDS = 15 V, VGS = 0 V Ch-2 - 40 - Ch-1 0.14 0.7 1.4 Gate resistance R g f = 1 MHz Ch-2 0.12 0.62 1.2 Ch-1 - 17 35 Turn-on delay time td(on) Channel-1 Ch-2 - 25 50 VDD = 15 V, RL = 3 I Ch-1 - 40 80 Rise time t D 5 A, VGEN = 4.5 V, Rg = 1 r Ch-2 - 53 110 Ch-1 - 23 45 Turn-off delay time td(off) Channel-2 Ch-2 - 30 60 VDD = 15 V, RL = 3 Ch-1 - 7 15 I Fall time t D 5 A, VGEN = 4.5 V, Rg = 1 f Ch-2 - 12 25 ns Ch-1 - 11 20 Turn-on delay time td(on) Channel-1 Ch-2 - 13 25 VDD = 15 V, RL = 3 I Ch-1 - 5 10 D 5 A, VGEN = 10 V, Rg = 1 Rise time tr Ch-2 - 20 40 Ch-1 - 23 45 Turn-off delay time td(off) Channel-2 Ch-2 - 32 65 VDD = 15 V, RL = 3 Ch-1 - 5 10 I Fall time t D 5 A, VGEN = 10 V, Rg = 1 f Ch-2 - 6 15 S18-0479-Rev. A, 30-Apr-2018
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Document Number: 76288 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
