Datasheet ADP150 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Ultralow Noise, 150 mA CMOS Linear Regulator |
| Pages / Page | 20 / 4 — ADP150. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. … |
| Revision | C |
| File Format / Size | PDF / 851 Kb |
| Document Language | English |
ADP150. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit
Model Line for this Datasheet
- ADP150ACBZ-1.8-R7 ADP150ACBZ-2.5-R7 ADP150ACBZ-2.6-R7 ADP150ACBZ-2.75R7 ADP150ACBZ-2.8-R7 ADP150ACBZ-2.85R7 ADP150ACBZ-3.0-R7 ADP150ACBZ-3.3-R7 ADP150AUJZ-1.8-R7 ADP150AUJZ-2.0-R7 ADP150AUJZ-2.5-R7 ADP150AUJZ-2.65-R7 ADP150AUJZ-2.8-R7 ADP150AUJZ-3.0-R7 ADP150AUJZ-3.3-R7 ADP150WACBZ-1.8-R7 ADP150WACBZ-2.5-R7 ADP150WACBZ-2.6-R7 ADP150WACBZ-2.75-R7 ADP150WACBZ-2.8-R7 ADP150WACBZ-2.85-R7 ADP150WACBZ-3.0-R7 ADP150WACBZ-3.3-R7
Text Version of Document
link to page 7
ADP150 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR 10 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 70 dB IN OUT OUT (V = V + 0.5 V) IN OUT 10 kHz, V = 2.3 V, V = 1.8 V, I = 10 mA 70 dB IN OUT OUT 100 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 100 kHz, V = 2.3 V, V = 1.8 V, I = 10 mA 55 dB IN OUT OUT POWER SUPPLY REJECTION RATIO 10 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 70 dB IN OUT OUT (V = V + 1 V) IN OUT 100 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 1 Based on an end-point calculation using 1 mA and 150 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.2 V. 3 Start-up time is defined as the time between the rising edges of EN to VOUT being at 90% of its nominal value. 4 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT AND OUTPUT CAPACITOR Minimum Input and Output Capacitance1 C T = −40°C to +125°C 0.7 µF MIN A Capacitor ESR R T = −40°C to +125°C 0.001 0.2 Ω ESR A 1 The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The ful range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R-type and X5R-type capacitors are recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. C | Page 4 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES
ADP150 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR 10 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 70 dB IN OUT OUT (V = V + 0.5 V) IN OUT 10 kHz, V = 2.3 V, V = 1.8 V, I = 10 mA 70 dB IN OUT OUT 100 kHz, V = 3.8 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 100 kHz, V = 2.3 V, V = 1.8 V, I = 10 mA 55 dB IN OUT OUT POWER SUPPLY REJECTION RATIO 10 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 70 dB IN OUT OUT (V = V + 1 V) IN OUT 100 kHz, V = 4.3 V, V = 3.3 V, I = 10 mA 55 dB IN OUT OUT 1 Based on an end-point calculation using 1 mA and 150 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 2.2 V. 3 Start-up time is defined as the time between the rising edges of EN to VOUT being at 90% of its nominal value. 4 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT AND OUTPUT CAPACITOR Minimum Input and Output Capacitance1 C T = −40°C to +125°C 0.7 µF MIN A Capacitor ESR R T = −40°C to +125°C 0.001 0.2 Ω ESR A 1 The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The ful range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R-type and X5R-type capacitors are recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. C | Page 4 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES
