Datasheet PE43610 (pSemi) - 4
| Manufacturer | pSemi |
| Description | UltraCMOS RF Digital Step Attenuator, 9 kHz–13 GHz |
| Pages / Page | 21 / 4 — PE43610. UltraCMOS® RF Digital Step Attenuator. Electrical Specifications … |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
PE43610. UltraCMOS® RF Digital Step Attenuator. Electrical Specifications Table 3
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PE43610 UltraCMOS® RF Digital Step Attenuator Electrical Specifications Table 3
provides the PE43610 key electrical specifications at 25 °C, ZS = ZL = 50Ω, unless otherwise specified. Normal mode is at VDD = 3.3V and VSS_EXT = 0V. Bypass mode is at VDD = 3.4V and VSS_EXT = –3.0V.
Table 3 • PE43610 Electrical Specifications Parameter Condition Min Typ Max Unit
Operation Frequency 9 kHz min frequency 9 kHz 13.00 GHz 5-bit, 1.0 dB step programming 0.00 31.00 dB Attenuation Range 6-bit, 0.5 dB step programming 0.00 31.50 dB +(1.0+4.5% of Attenuation Error 0.5 dB, 0–31.5 dB step, 9 kHz–13 GHz at enuation set- dB ting) / -1 +(1.0+4.5% of Attenuation Error 1 dB, 0–31dB step, 9 kHz–13 GHz at enuation set- dB ting) /-1 9 kHz–2 GHz 1.60 1.90 dB 2–4 GHz 1.80 2.10 Insertion Loss 4–6 GHz 2.00 2.30 6–8 GHz 2.20 2.60 dB 8–13 GHz 2.50 3.00 Return Loss All states, 9 kHz–13 GHz 13.00 dB Relative Phase All states, 9 kHz–13 GHz 20.00 deg Input IP2 18 dBm tone @ 13 GHz 95.00 dBm Input IP3 18 dBm per tone, 20 MHz spacing @ 13 GHz 50.00 dBm Input 1 dB Compression Pt. Bi-directional 32.00 34.00 dBm Input 0.1dB Compression Pt. Bi-directional 25.00 28.00 dBm RF Rise and Fal Time 10%/90% RF 250.00 ns Settling Time RF set led to within 0.05 dB of final value 500.00 ns Switching Time 50% CTRL to 90% or 10% RF 330.00 430.00 ns Attenuation Transient Any state change -7.50 dB Page 4 of 21 DOC-93588-3 – (06/2020) www.psemi.com Document Outline Features Applications Product Description Optional External VSS Control Absolute Maximum Ratings ESD Precautions Latch-up Immunity Recommended Operating Conditions Electrical Specifications Switching Frequency Spur-free Performance Glitch-safe Attenuation State The PE43610 features a novel architecture to provide safe transition behavior when changing attenuation states. When RF input power is applied, positive output power spikes are prevented during attenuation state changes by optimized internal timing c... Truth Tables Serial Addressable Register Map Programming Options Parallel/Serial Selection Parallel Mode Interface For direct parallel programming, the LE line should be pulled HIGH. Changing attenuation state control values changes the device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Serial-Addressable Interface Power-up Control Settings Typical Performance Data Pin Configuration Packaging Information Moisture Sensitivity Level Package Drawing Top-Marking Specification Tape and Reel Specification Ordering Information
PE43610 UltraCMOS® RF Digital Step Attenuator Electrical Specifications Table 3
provides the PE43610 key electrical specifications at 25 °C, ZS = ZL = 50Ω, unless otherwise specified. Normal mode is at VDD = 3.3V and VSS_EXT = 0V. Bypass mode is at VDD = 3.4V and VSS_EXT = –3.0V.
Table 3 • PE43610 Electrical Specifications Parameter Condition Min Typ Max Unit
Operation Frequency 9 kHz min frequency 9 kHz 13.00 GHz 5-bit, 1.0 dB step programming 0.00 31.00 dB Attenuation Range 6-bit, 0.5 dB step programming 0.00 31.50 dB +(1.0+4.5% of Attenuation Error 0.5 dB, 0–31.5 dB step, 9 kHz–13 GHz at enuation set- dB ting) / -1 +(1.0+4.5% of Attenuation Error 1 dB, 0–31dB step, 9 kHz–13 GHz at enuation set- dB ting) /-1 9 kHz–2 GHz 1.60 1.90 dB 2–4 GHz 1.80 2.10 Insertion Loss 4–6 GHz 2.00 2.30 6–8 GHz 2.20 2.60 dB 8–13 GHz 2.50 3.00 Return Loss All states, 9 kHz–13 GHz 13.00 dB Relative Phase All states, 9 kHz–13 GHz 20.00 deg Input IP2 18 dBm tone @ 13 GHz 95.00 dBm Input IP3 18 dBm per tone, 20 MHz spacing @ 13 GHz 50.00 dBm Input 1 dB Compression Pt. Bi-directional 32.00 34.00 dBm Input 0.1dB Compression Pt. Bi-directional 25.00 28.00 dBm RF Rise and Fal Time 10%/90% RF 250.00 ns Settling Time RF set led to within 0.05 dB of final value 500.00 ns Switching Time 50% CTRL to 90% or 10% RF 330.00 430.00 ns Attenuation Transient Any state change -7.50 dB Page 4 of 21 DOC-93588-3 – (06/2020) www.psemi.com Document Outline Features Applications Product Description Optional External VSS Control Absolute Maximum Ratings ESD Precautions Latch-up Immunity Recommended Operating Conditions Electrical Specifications Switching Frequency Spur-free Performance Glitch-safe Attenuation State The PE43610 features a novel architecture to provide safe transition behavior when changing attenuation states. When RF input power is applied, positive output power spikes are prevented during attenuation state changes by optimized internal timing c... Truth Tables Serial Addressable Register Map Programming Options Parallel/Serial Selection Parallel Mode Interface For direct parallel programming, the LE line should be pulled HIGH. Changing attenuation state control values changes the device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Serial-Addressable Interface Power-up Control Settings Typical Performance Data Pin Configuration Packaging Information Moisture Sensitivity Level Package Drawing Top-Marking Specification Tape and Reel Specification Ordering Information
