Datasheet PE43610 (pSemi) - 5

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PE43610 UltraCMOS® RF Digital Step Attenuator Switching Frequency Table 4 • Paral el Truth Table (Cont.)
The PE43610 has a maximum 400 kHz switching rate in normal mode (pin 2 tied to ground). A faster
Paral el Control Setting Attenuation
switching rate is available in bypass mode (pin 2 tied
Setting D6
to VSS_EXT). The rate at which the PE43610 can be
RF1–RF2 (MSB) D5 D4 D3 D2 D1 (LSB)
switched is then limited to the switching time as specified in
Table 3
. L H L L L L 8 dB Switching frequency is defined to be the speed at H L L L L L 16 dB which the DSA can be toggled across attenuation states. Switching time is the time duration between H H H H H H 31.5 dB the point the control signal reaches 50% of the final value and the point the output signal reaches within
Table 5 • Serial Address Word Truth Table
10% or 90% of its target value.
Address Word Spur-free Performance Address A7 Setting
The PE43610 spur fundamental occurs around 4
(MSB) A6 A5 A4 A3 A2 A1 A0 (LSB)
MHz. Typical spurious performance in normal mode is –168 dBm/Hz (pin 2 tied to ground), with 30 kHz L L L L L L L L 000 bandwidth. If spur-free performance is desired, the internal negative voltage generator can be disabled L L L L L L L H 001 by applying a negative voltage to VSS_EXT (pin 2). L L L L L L H L 010
Glitch-safe Attenuation State
L L L L L L H H 011 L L L L L H L L 100 The PE43610 features a novel architecture to provide L L L L L H L H 101 safe transition behavior when changing attenuation states. When RF input power is applied, positive out- L L L L L H H L 110 put power spikes are prevented during attenuation L L L L L H H H 111 state changes by optimized internal timing control.
Truth Tables Table 6 • Serial Attenuation Word Truth Table Table 4
–
Table 6
provide the truth tables for the
Attenuation Word Attenuatio
PE43610.
n Setting D7 RF1–RF2 Table 4 • Paral el Truth Table (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) Paral el Control Setting
L L L L L L L L Reference IL
Attenuation Setting
L L L L L L H L 0.5 dB
D6 RF1–RF2 (MSB) D5 D4 D3 D2 D1 (LSB)
L L L L L H L L 1 dB L L L L H L L L 2 dB L L L L L L Reference IL L L L H L L L L 4 dB L L L L L H 0.5 dB L L H L L L L L 8 dB L L L L H L 1 dB L H L L L L L L 16 dB L L L H L L 2 dB L H H H H H H L 31.5 dB L L H L L L 4 dB DOC-93588-3 – (06/2020) Page 5 of 21 www.psemi.com Document Outline Features Applications Product Description Optional External VSS Control Absolute Maximum Ratings ESD Precautions Latch-up Immunity Recommended Operating Conditions Electrical Specifications Switching Frequency Spur-free Performance Glitch-safe Attenuation State The PE43610 features a novel architecture to provide safe transition behavior when changing attenuation states. When RF input power is applied, positive output power spikes are prevented during attenuation state changes by optimized internal timing c... Truth Tables Serial Addressable Register Map Programming Options Parallel/Serial Selection Parallel Mode Interface For direct parallel programming, the LE line should be pulled HIGH. Changing attenuation state control values changes the device state to new attenuation. Direct mode is ideal for manual control of the device (using hardwire, switches, or jumpers). Serial-Addressable Interface Power-up Control Settings Typical Performance Data Pin Configuration Packaging Information Moisture Sensitivity Level Package Drawing Top-Marking Specification Tape and Reel Specification Ordering Information