Datasheet MLX75027 (Melexis)

ManufacturerMelexis
DescriptionVGA Time-of-Flight Sensor
Pages / Page67 / 1 — MLX75027 VGA Time-of-Flight Sensor. Features & Benefits. Description
File Format / SizePDF / 3.2 Mb
Document LanguageEnglish

MLX75027 VGA Time-of-Flight Sensor. Features & Benefits. Description

Datasheet MLX75027 Melexis

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MLX75027 VGA Time-of-Flight Sensor
PRELIMINARY DATASHEET v0.9
Features & Benefits Description
 1/2" optical Time-of-Flight image sensor MLX75027 is a fully integrated optical Time-of-  VGA (640 x 480) pixel array Flight image sensor. It’s perfectly suited for  10 x 10 µm DepthSense pixels automotive applications, including, but not  Integrated microlenses limited to, gesture recognition, driver  Backside illumination (BSI technology) monitoring, skeleton tracking, people or obstacle  External quantum efficiency 51% (850nm) detection and traffic monitoring. The sensor  External quantum efficiency 28% (940nm) features a VGA (640x480) pixel array based on  High distance accuracy due to programmable the DepthSense pixel technology. Combined modulating frequencies up to 100 MHz with a modulated light source this sensor is  AC Demodulation contrast 85 % (40 MHz) capable of measuring object distance and  AC Demodulation contrast 78 % (100 MHz) reflectivity under extreme background light  Differential light source control with phase conditions, 120KLUX robust when using lens with delay feedback loop filter. This distance information can be used to  Full resolution distance framerate of calculate a complete 3D point cloud max. 120 FPS (4 phases, Tint 300µs, 4lane representation of a scene. Full resolution image data @960mbps MIPI configuration) acquisition up to 120 distance frames per second  Up to 8 raw phases (or quads) per frame while supplied to a microcontroller via a  Per-phase statistics & diagnostics standardized MIPI CSI-2 serial camera interface.  Continuous or triggered operation mode(s) The device is available in a ceramic BGA package  Configurable over I2C (up to 400kHz) and offers a variety of integration possibilities.  CSI-2 serial data output, MIPI D-PHY, 1 clock lane, 2 or 4 data lanes (< 960 Mbps/lane)  Build-in temperature sensor  Region of interest (ROI) selection  Integrated support for binning (2x2, 4x4, 8x8)  Horizontal mirror & vertical flip image modes  14 x 14 x 2.2 mm ceramic BGA package  Number of pins = 141  Ambient operating temperature range of -40 - 105°C  MSL level 3 rated  AEC-Q100 qualified (grade 2) Preliminary Datasheet: Melexis reserves the right to change the product and spec ifications without prior notice. The information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the device. Melexis cannot assume responsibility for any problems arising out of the use of these circuits. Document Outline Table of Contents Document Revision History Ordering Information 1. System Architecture 2. Sensor Block Diagram 3. Electrical Specifications 3.1. Absolute Maximum Ratings 3.2. Typical Operating Conditions 3.3. Video Interface 3.3.1. MIPI DC specification 3.3.2. MIPI AC specification 3.4. Power Consumption 3.5. Maximum Distance Frame Rate 3.6. Decoupling Recommendations 3.7. Power-up Sequence 3.8. Input Clock Requirements 3.9. I2C Specifications 4. Optical Characteristics 4.1. VGA Pixel Array Configuration 4.2. Pixel & Image Array Characteristics 4.3. CRA (Chief Ray Angle) 4.4. MTF (Modulation Transfer Function ) 4.5. Application Lens Design Recommendations 5. Communication Interface(s) 5.1. I2C (Inter-Integrated Circuit) 5.1.1. I2C Timing Sequence 5.1.2. Single I2C Read 5.1.3. Sequential I2C Read 5.1.4. Single I2C Write 5.1.5. Sequential I2C Write 5.1.6. I2C Slave Address 5.2. MIPI Alliance CSI-2 Description 5.2.1. Packet Structure 5.2.2. Data Format RAW12 5.2.2.1. Data Format in 4 Lane MIPI Configuration 5.2.2.2. Data Format in 2 Lane MIPI Configuration 6. Start-up Sequence 6.1. Initialization Process 6.2. Initialization Register Map 7. Register Settings 7.1. Video Output Configuration 7.2. Modes of Operation 7.3. Data Output Modes 7.4. HMAX & Frame Read-Out Time 7.4.1. PLLSSETUP 7.4.2. PRETIME 7.4.3. RANDNM0 7.5. PARAM_HOLD 7.6. USER_ID Register 7.7. Modulation Frequency 7.8. Frame Structure & Frame Rate 7.9. FRAME_STARTUP 7.10. FRAME_TIME 7.11. PHASE_COUNT 7.12. Px_PREHEAT, Px_PREMIX 7.13. Px_INTEGRATION 7.14. Px_PHASE_SHIFT 7.15. Px_PHASE_IDLE (or V-blanking) 7.16. Px_LEDEN 7.17. Px_DMIX0, Px_DMIX1 & Px_STATIC_LED 7.18. Analog Delay Setting 7.18.1. Coarse Delay 7.18.2. Fine Delay 7.18.3. Super Fine 7.19. Pixel Binning 7.20. Region of Interest (ROI) 7.21. Flip & Mirror 7.22. Temperature Sensor 7.23. Pixel & Phase Statistics 7.24. PN9 Test Pattern 7.25. Duty Cycle Adjustment 7.26. Illumination Signal (subLVDS or CMOS) 8. MetaData Description 8.1. Embedded Data Format in 4 Lane MIPI Configuration 8.2. Embedded Data Format in 2 Lane MIPI Configuration 9. Distance & Amplitude Calculation 10. Package Information 10.1. Transmittance and Reflectance 10.2. Pinout & Equivalent I/O Circuitry 10.3. Mechanical Dimensions 10.4. Package Marking 10.5. PCB Landing Pattern 10.6. Reflow Solder Profile 10.7. Reflow Cleaning Instructions 10.8. Cover Tape Removal Disclaimer
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