Datasheet ADA4320-1 (Analog Devices) - 3

ADA4320-1 SPECIFICATIONS TA = 25°C, VS = 5 V, RL = 75 Ω, VIN (differential) = 29 dB mV sinusoidal, f = 5 MHz to 85 MHz, gain, VOUT (single-ended) measured at output of Coilcraft PWB-4-BL transformer, unless otherwise noted.
Table 1. Parameter Conditions Min Typ Max Unit
INPUT CHARACTERISTICS

Input Resistance Balanced (differential) input 640 Ω Unbalanced (single-ended) input 320 Ω Input Capacitance 2.0 pF GAIN CONTROL Current Level 3 Gain Range 57.5 59 60 dB Maximum Gain Gain Code 60 30.5 32 dB Minimum Gain Gain Code 01 −27 −25.5 dB Output Step Size 0.6 1.0 1.4 dB/LSB OUTPUT CHARACTERISTICS Gain Flatness Referenced to 10 MHz At Maximum Gain f = 42 MHz, Gain Code 60, Current Level 3 −0.3 dB f = 65 MHz, Gain Code 60, Current Level 3 −0.7 dB f = 85 MHz, Gain Code 60, Current Level 3 −1.1 dB At Minimum Gain f = 42 MHz, Gain Code 01, Current Level 0 −0.4 dB f = 65 MHz, Gain Code 01, Current Level 0 −0.8 dB f = 85 MHz, Gain Code 01, Current Level 0 −1.8 dB 1 dB Compression Point (P1dB) f = 10 MHz, Gain Code 60, Current Level 3, output referred 70 dB mV Output Noise in 160 kHz Bandwidth f = 10 MHz, 294 Ω resistor across VIN+ and VIN− pins At Maximum Gain Gain Code 60, Current Level 3, TXEN = high (1) −19 −20 dB mV Gain Code 60, Current Level 0, TXEN = high (1) −20 −21 dB mV At Minimum Gain Gain Code 01, Current Level 3, TXEN = high (1) −59 −60 dB mV Gain Code 01, Current Level 0, TXEN = high (1) −60 −61 dB mV Transmit Disabled TXEN = low (0) −68 −70 dB mV Output Impedance (Measured at TXEN = high (1) or TXEN = low (0) or SLEEP = low (0) 75 Ω Transformer Output) Output Return Loss (Measured at f = 85 MHz Transformer Output) SLEEP = high (1), TXEN = high (1) 12 dB SLEEP = high (1), TXEN = low (0) 11 dB SLEEP = low (0) 10 dB OVERALL PERFORMANCE Adjacent Channel Power Ratio (ACPR) Single QPSK Channel f = 5 MHz to 85 MHz, output level = 61 dB mV, −66 dBc Gain Code 60, Current Level 3, channel width = 6.4 MHz, adjacent channel width = 6.4 MHz 4x QAM64 Channels f = 5 MHz to 85 MHz, output level = 53 dB mV/channel, −63 dBc Gain Code 60, Current Level 3, channel width = 1.6 MHz, adjacent channel width = 1.6 MHz Output Third-Order Intercept Point (OIP3) f1 = 84 MHz, f2 = 85 MHz, Gain Code 60, Current Level 3 93 dB mV f1 = 84 MHz, f2 = 85 MHz, Gain Code 60, Current Level 0 87 dB mV Input-to-Output Isolation f = 85 MHz, Gain Code 60, TXEN = Low (0) 107 dB Rev. A | Page 3 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS LOGIC INPUTS (TTL-/CMOS-COMPATIBLE LOGIC) TIMING REQUIREMENTS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION GENERAL APPLICATIONS CIRCUIT DESCRIPTION PROGRAMMING CURRENT LEVEL AND GAIN ADJUSTMENT POWER SAVING FEATURES INPUT BIAS, IMPEDANCE, AND TERMINATION OUTPUT BIAS, IMPEDANCE, AND TERMINATION POWER SUPPLY SIGNAL INTEGRITY LAYOUT CONSIDERATIONS INITIAL POWER-UP RAMP PIN FEATURE OUTPUT TRANSFORMER OUTLINE DIMENSIONS ORDERING GUIDE