Datasheet STD30NF06LT4 (STMicroelectronics)
| Manufacturer | STMicroelectronics |
| Description | N-channel 60 V, 0.022 Ω typ., 35 A STripFET II Power MOSFET in a DPAK package |
| Pages / Page | 19 / 1 — STD30NF06LT4. Datasheet. production data. Features. Order code. VDS. … |
| File Format / Size | PDF / 878 Kb |
| Document Language | English |
STD30NF06LT4. Datasheet. production data. Features. Order code. VDS. RDS(on) max. DPAK. Applications. Description
Text Version of Document
STD30NF06LT4
N-channel 60 V, 0.022 Ω typ., 35 A STripFET™ II Power MOSFET in a DPAK package
Datasheet
-
production data Features Order code VDS RDS(on) max. ID
STD30NF06LT4 60 V 0.028 Ω 35 A TAB • Low threshold drive 3 • Gate charge minimized 1
DPAK Applications
• Switching applications
Description Figure 1. Internal schematic diagram
This Power MOSFET has been developed using STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input 'Ć7$% capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate * charge driving requirements. 6 $0Y
Table 1. Device summary Order code Marking Packages Packaging
STD30NF06LT4 D30NF06L DPAK Tape and reel May 2014 DocID026310 Rev 1 1/19 This is information on a product in full production. www.st.com Document Outline Figure 1. Internal schematic diagram Table 1. Device summary 1 Electrical ratings Table 2. Absolute maximum ratings Table 3. Thermal data Table 4. Avalanche characteristics 2 Electrical characteristics Table 5. On /off states Table 6. Dynamic Table 7. Switching times Table 8. Source drain diode 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance vs temperature Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Source-drain diode forward characteristics 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 4 Package mechanical data Figure 19. DPAK (TO-252) type A drawing Table 9. DPAK (TO-252) type A mechanical data Figure 20. DPAK (TO-252) type A footprint Figure 21. DPAK (TO-252) type C drawing Table 10. DPAK (TO-252) type C mechanical data Figure 22. DPAK (TO-252) type A footprint 5 Packaging mechanical data Figure 23. Tape for DPAK (TO-252) Figure 24. Reel for DPAK (TO-252) Table 11. DPAK (TO-252) tape and reel mechanical data 6 Revision history Table 12. Document revision history
N-channel 60 V, 0.022 Ω typ., 35 A STripFET™ II Power MOSFET in a DPAK package
Datasheet
-
production data Features Order code VDS RDS(on) max. ID
STD30NF06LT4 60 V 0.028 Ω 35 A TAB • Low threshold drive 3 • Gate charge minimized 1
DPAK Applications
• Switching applications
Description Figure 1. Internal schematic diagram
This Power MOSFET has been developed using STMicroelectronics’ unique STripFET process, which is specifically designed to minimize input 'Ć7$% capacitance and gate charge. This renders the device suitable for use as primary switch in advanced high-efficiency isolated DC-DC converters for telecom and computer applications, and applications with low gate * charge driving requirements. 6 $0Y
Table 1. Device summary Order code Marking Packages Packaging
STD30NF06LT4 D30NF06L DPAK Tape and reel May 2014 DocID026310 Rev 1 1/19 This is information on a product in full production. www.st.com Document Outline Figure 1. Internal schematic diagram Table 1. Device summary 1 Electrical ratings Table 2. Absolute maximum ratings Table 3. Thermal data Table 4. Avalanche characteristics 2 Electrical characteristics Table 5. On /off states Table 6. Dynamic Table 7. Switching times Table 8. Source drain diode 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance vs temperature Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Source-drain diode forward characteristics 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 4 Package mechanical data Figure 19. DPAK (TO-252) type A drawing Table 9. DPAK (TO-252) type A mechanical data Figure 20. DPAK (TO-252) type A footprint Figure 21. DPAK (TO-252) type C drawing Table 10. DPAK (TO-252) type C mechanical data Figure 22. DPAK (TO-252) type A footprint 5 Packaging mechanical data Figure 23. Tape for DPAK (TO-252) Figure 24. Reel for DPAK (TO-252) Table 11. DPAK (TO-252) tape and reel mechanical data 6 Revision history Table 12. Document revision history
