Datasheet NJW21193G, NJW21194G (ON Semiconductor) - 8
| Manufacturer | ON Semiconductor |
| Description | 16 Amperes Complementary Silicon Power Transistors 250 Volts, 200 Watts |
| Pages / Page | 9 / 8 — PACKAGE DIMENSIONS. TO−3P−3LD. A SEATING. PLANE. SCALE 1:1. MILLIMETERS. … |
| File Format / Size | PDF / 243 Kb |
| Document Language | English |
PACKAGE DIMENSIONS. TO−3P−3LD. A SEATING. PLANE. SCALE 1:1. MILLIMETERS. DIM. MIN. NOM. MAX. 3X D. GENERIC MARKING. DIAGRAM*
Model Line for this Datasheet
Text Version of Document
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS TO−3P−3LD
CASE 340AB−01 ISSUE A DATE 30 OCT 2007 NOTES:
A SEATING
1. DIMENSIONING AND TOLERANCING PER ASME
B B PLANE C
Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS
Q U E
3. DIMENSION b APPLIES TO PLATED TERMINAL
4
AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM THE TERMINAL TIP.
SCALE 1:1
4. DIMENSION A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
A L MILLIMETERS DIM MIN NOM MAX A
19.70 19.90 20.10
B
15.40 15.60 15.80
C
4.60 4.80 5.00
D
0.80 1.00 1.20 (3°)
E
1.45 1.50 1.65
P K F
1.80 2.00 2.20
G
5.45 BSC
H
1.20 1.40 1.60
J
0.55 0.60 0.75
1 2 3 K
19.80 20.00 20.20
H L
18.50 18.70 18.90
F 3X D P
3.30 3.50 3.70
Q
3.10 3.20 3.50 0.25
W
M A B S
J U
5.00 REF
G W
2.80 3.00 3.20
G GENERIC MARKING DIAGRAM*
STYLE 1: STYLE 2: STYLE 3: PIN 1. BASE PIN 1. ANODE PIN 1. GATE 2. COLLECTOR 2. CATHODE 2. DRAIN 3. EMITTER 3. ANODE 3. SOURCE 4. COLLECTOR 4. CATHODE 4. DRAIN xxxxxG AYWW xxxxx = Specific Device Code G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present.
DOCUMENT NUMBER: 98AON25095D
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−3P−3LD PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
PACKAGE DIMENSIONS TO−3P−3LD
CASE 340AB−01 ISSUE A DATE 30 OCT 2007 NOTES:
A SEATING
1. DIMENSIONING AND TOLERANCING PER ASME
B B PLANE C
Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS
Q U E
3. DIMENSION b APPLIES TO PLATED TERMINAL
4
AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM THE TERMINAL TIP.
SCALE 1:1
4. DIMENSION A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
A L MILLIMETERS DIM MIN NOM MAX A
19.70 19.90 20.10
B
15.40 15.60 15.80
C
4.60 4.80 5.00
D
0.80 1.00 1.20 (3°)
E
1.45 1.50 1.65
P K F
1.80 2.00 2.20
G
5.45 BSC
H
1.20 1.40 1.60
J
0.55 0.60 0.75
1 2 3 K
19.80 20.00 20.20
H L
18.50 18.70 18.90
F 3X D P
3.30 3.50 3.70
Q
3.10 3.20 3.50 0.25
W
M A B S
J U
5.00 REF
G W
2.80 3.00 3.20
G GENERIC MARKING DIAGRAM*
STYLE 1: STYLE 2: STYLE 3: PIN 1. BASE PIN 1. ANODE PIN 1. GATE 2. COLLECTOR 2. CATHODE 2. DRAIN 3. EMITTER 3. ANODE 3. SOURCE 4. COLLECTOR 4. CATHODE 4. DRAIN xxxxxG AYWW xxxxx = Specific Device Code G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present.
DOCUMENT NUMBER: 98AON25095D
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: TO−3P−3LD PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
