Datasheet MCP6561, MCP6561R, MCP6561U, MCP6562, MCP6564 (Microchip) - 4

ManufacturerMicrochip
Description1.8V Low-Power Push-Pull Output Comparator
Pages / Page46 / 4 — MCP6561/1R/1U/2/4. AC CHARACTERISTICS. Electrical Characteristics:. …
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MCP6561/1R/1U/2/4. AC CHARACTERISTICS. Electrical Characteristics:. Parameters. Symbol. Min. Typ. Max. Units. Conditions. Propagation Delay

MCP6561/1R/1U/2/4 AC CHARACTERISTICS Electrical Characteristics: Parameters Symbol Min Typ Max Units Conditions Propagation Delay

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MCP6561/1R/1U/2/4 AC CHARACTERISTICS Electrical Characteristics:
Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN- = VSS, RL = 10 k to VDD/2, and CL = 25 pF. (see Figure 1-1).
Parameters Symbol Min Typ Max Units Conditions Propagation Delay
High-to-Low,100 mV Overdrive tPHL — 56 80 ns VCM= VDD/2, VDD = 1.8V — 34 80 ns VCM= VDD/2, VDD = 5.5V Low-to-High, 100 mV Overdrive tPLH — 49 80 ns VCM= VDD/2, VDD = 1.8V — 47 80 ns VCM= VDD/2, VDD = 5.5V Skew 1 tPDS — ±10 — ns
Output
Rise Time tR — 20 — ns Fall Time tF — 20 — ns Maximum Toggle Frequency fTG — 4 — MHz VDD = 5.5V — 2 — MHz VDD = 1.8V Input Voltage Noise 2 ENI — 350 — µVP-P 10 Hz to 10 MHz
Note 1:
Propagation Delay Skew is defined as: tPDS = tPLH - tPHL.
2:
ENI is based on SPICE simulation.
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated: VDD = +1.8V to +5.5V and VSS = GND.
Parameters Symbol Min Typ Max Units Conditions Temperature Ranges
Specified Temperature Range TA -40 — +125 °C Operating Temperature Range TA -40 — +125 °C Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, SC70-5 JA — 331 — °C/W Thermal Resistance, SOT-23-5 JA — 220.7 — °C/W Thermal Resistance, 8L-SOIC JA — 149.5 — °C/W Thermal Resistance, 8L-MSOP JA — 211 — °C/W Thermal Resistance, 14L-SOIC JA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP JA — 100 — °C/W
1.2 Test Circuit Configuration
This test circuit configuration is used to determine the AC and DC specifications. VDD
MCP656X
200 k I 200 k OUT 200 k VOUT 200 k 25 pF V V SS = 0V IN = VSS
FIGURE 1-1:
AC and DC Test Circuit for the Push-Pull Output Comparators. DS22139C-page 4  2009-2013 Microchip Technology Inc. Document Outline MCP6561/1R/1U/2/4 1.0 Electrical Characteristics 1.1 Maximum Ratings 1.2 Test Circuit Configuration FIGURE 1-1: AC and DC Test Circuit for the Push-Pull Output Comparators. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input vs. Output Signal, No Phase Reversal. FIGURE 2-4: Input Hysteresis Voltage. FIGURE 2-5: Input Hysteresis Voltage Drift - Linear Temp. Co. (TC1). FIGURE 2-6: Input Hysteresis Voltage Drift - Quadratic Temp. Co. (TC2). FIGURE 2-7: Input Offset Voltage vs. Temperature. FIGURE 2-8: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-9: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-10: Input Hysteresis Voltage vs. Temperature. FIGURE 2-11: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-12: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-13: Input Offset Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-14: Quiescent Current. FIGURE 2-15: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-16: Input Hysteresis Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-17: Quiescent Current vs. Supply Voltage vs Temperature. FIGURE 2-18: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-19: Quiescent Current vs. Toggle Frequency. FIGURE 2-20: Output Headroom vs. Output Current. FIGURE 2-21: Low-to-High and High-to- Low Propagation Delays. FIGURE 2-22: Short Circuit Current vs. Supply Voltage vs. Temperature. FIGURE 2-23: Output Headroom vs.Output Current. FIGURE 2-24: Low-to-High and High-to- Low Propagation Delays . FIGURE 2-25: Propagation Delay Skew. FIGURE 2-26: Propagation Delay vs. Supply Voltage. FIGURE 2-27: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-28: Propagation Delay vs. Temperature. FIGURE 2-29: Propagation Delay vs. Input Over-Drive. FIGURE 2-30: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-31: Propagation Delay vs. Capacitive Load. FIGURE 2-32: Input Bias Current vs. Input Voltage vs Temperature. FIGURE 2-33: Common-mode Rejection Ratio and Power Supply Rejection Ratio vs. Temperature. FIGURE 2-34: Power Supply Rejection Ratio (PSRR). FIGURE 2-35: Common-mode Rejection Ratio (CMRR). FIGURE 2-36: Common-mode Rejection Ratio (CMRR). FIGURE 2-37: Output Jitter vs. Input Frequency. FIGURE 2-38: Input Offset Current and Input Bias Current vs. Temperature. FIGURE 2-39: Input Offset Current and Input Bias Current vs. Common-mode Input Voltage vs. Temperature. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Inputs 3.2 Digital Outputs 3.3 Power Supply (VSS and VDD) 4.0 Applications Information 4.1 Comparator Inputs 4.1.1 Normal Operation FIGURE 4-1: The MCP6561/1R/1U/2/4 Comparators’ Internal Hysteresis Eliminates Output Chatter Caused by Input Noise Voltage. 4.1.2 Input Voltage and Current Limits FIGURE 4-2: Simplified Analog Input ESD Structures. FIGURE 4-3: Protecting the Analog Inputs. 4.1.3 Phase Reversal 4.2 Push-Pull Output 4.3 Externally Set Hysteresis 4.3.1 Non-Inverting Circuit FIGURE 4-4: Non-inverting Circuit with Hysteresis for Single-Supply. FIGURE 4-5: Hysteresis Diagram for the Non-inverting Circuit. 4.3.2 Inverting Circuit FIGURE 4-6: Inverting Circuit With Hysteresis. FIGURE 4-7: Hysteresis Diagram for the Inverting Circuit. FIGURE 4-8: Thevenin Equivalent Circuit. 4.4 Bypass Capacitors 4.5 Capacitive Loads 4.6 PCB Surface Leakage FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 4.7 PCB Layout Technique FIGURE 4-10: Recommended Layout. 4.8 Unused Comparators FIGURE 4-11: Unused Comparators. 4.9 Typical Applications 4.9.1 Precise Comparator FIGURE 4-12: Precise Inverting Comparator. 4.9.2 Windowed Comparator FIGURE 4-13: Windowed Comparator. 4.9.3 Bistable Multivibrator FIGURE 4-14: Bistable Multivibrator. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
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