Datasheet LMC555 (Texas Instruments) - 8

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LMC555
SNAS558M – FEBRUARY 2000 – REVISED JULY 2016
www.ti.com Feature Description (continued) 8.3.2 Various Packages and Compatibility
There are various packages available for use of the LMC555. In addition to the standard package (8-pin SOIC, VSSOP, and PDIP, the LMC555 is also available in a chip-sized package (8-bump DSBGA). The PDIP, SOIC, and VSSOP packages for the LMC555 are pin-for-pin compatible with the 555 series of timers (NE555/SE555/LM555) allowing flexibility in design and unnecessary modifications to PCB schematics and layouts.
8.3.3 Operates in Both Astable and Monostable Mode
The LMC555 can operate in both astable and monostable mode depending on the application requirements. • Monostable mode: The LMC555 timer acts as a “one-shot” pulse generator. The pulse begins when the LMC555 timer receives a signal at the trigger input that falls below a 1/3 of the voltage supply. The width of the output pulse is determined by the time constant of an RC network. The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be extended or shortened depending on the application by adjusting the R and C values. • Astable (free-running) mode: The LMC555 timer can operate as an oscillator and puts out a continuous stream of rectangular pulses having a specified frequency. The frequency of the pulse stream depends on the values of RA, RB, and C.
8.4 Device Functional Modes 8.4.1 Monostable Operation
In this mode of operation, the timer functions as a one-shot (Figure 3). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 VS to the Trigger terminal, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high.
Figure 3. Monostable (One-Shot)
The voltage across the capacitor then increases exponentially for a period of tH = 1.1 RAC, which is also the time that the output stays high, at the end of which time the voltage equals 2/3 VS. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 4 shows the waveforms generated in this mode of operation. Because the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply. 8 Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated Product Folder Links: LMC555 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 7 Parameter Measurement Information 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Low-Power Dissipation 8.3.2 Various Packages and Compatibility 8.3.3 Operates in Both Astable and Monostable Mode 8.4 Device Functional Modes 8.4.1 Monostable Operation 8.4.2 Astable Operation 9 Application and Implementation 9.1 Application Information 9.2 Typical Application 9.2.1 Design Requirements 9.2.2 Detailed Design Procedure 9.2.3 Application Curve 9.3 Frequency Divider 9.3.1 Design Requirements 9.3.2 Application Curve 9.4 Pulse Width Modulator 9.4.1 Design Requirements 9.4.2 Application Curve 9.5 Pulse Position Modulator 9.5.1 Design Requirements 9.5.2 Application Curve 9.6 50% Duty Cycle Oscillator 9.6.1 Design Requirements 10 Power Supply Recommendations 11 Layout 11.1 Layout Guidelines 11.2 Layout Example 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates 12.2 Community Resources 12.3 Trademarks 12.4 Electrostatic Discharge Caution 12.5 Glossary 13 Mechanical, Packaging, and Orderable Information