Datasheet Texas Instruments CD74HC74

ManufacturerTexas Instruments
SeriesCD74HC74
Datasheet Texas Instruments CD74HC74

High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset

Datasheets

CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 datasheet
PDF, 727 Kb, Revision: D, File published: Aug 21, 2003
Extract from the document

Prices

Status

CD74HC74ECD74HC74EE4CD74HC74MCD74HC74M96CD74HC74M96E4CD74HC74M96G4CD74HC74ME4CD74HC74MTCD74HC74MTE4CD74HC74MTG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoYesNoNoNoYesNo

Packaging

CD74HC74ECD74HC74EE4CD74HC74MCD74HC74M96CD74HC74M96E4CD74HC74M96G4CD74HC74ME4CD74HC74MTCD74HC74MTE4CD74HC74MTG4
Pin14141414141414141414
Package TypeNNDDDDDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525502500250050250250250
CarrierTUBETUBETUBELARGE T&RLARGE T&RTUBESMALL T&RSMALL T&RSMALL T&R
Device MarkingCD74HC74ECD74HC74EHC74MHC74MHC74MHC74MHC74MHC74MHC74M
Width (mm)6.356.353.913.913.913.913.913.913.913.91
Length (mm)19.319.38.658.658.658.658.658.658.658.65
Thickness (mm)3.93.91.581.581.581.581.581.581.581.58
Pitch (mm)2.542.541.271.271.271.271.271.271.271.27
Max Height (mm)5.085.081.751.751.751.751.751.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74HC74E
CD74HC74E
CD74HC74EE4
CD74HC74EE4
CD74HC74M
CD74HC74M
CD74HC74M96
CD74HC74M96
CD74HC74M96E4
CD74HC74M96E4
CD74HC74M96G4
CD74HC74M96G4
CD74HC74ME4
CD74HC74ME4
CD74HC74MT
CD74HC74MT
CD74HC74MTE4
CD74HC74MTE4
CD74HC74MTG4
CD74HC74MTG4
3-State OutputNoNoNoNoNoNoNoNoNoNo
Approx. Price (US$)0.14 | 1ku
Bits222222222
Bits(#)2
F @ Nom Voltage(Max), Mhz282828282828282828
F @ Nom Voltage(Max)(Mhz)28
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.04
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Operating Temperature Range(C)-55 to 125
Output Drive (IOL/IOH)(Max), mA5.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.2
Output Drive (IOL/IOH)(Max)(mA)5.2/-5.2
Package GroupPDIPPDIPSOICSOICSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNo
Technology FamilyHCHCHCHCHCHCHCHCHCHC
VCC(Max), V666666666
VCC(Max)(V)6
VCC(Min), V222222222
VCC(Min)(V)2
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,5
Voltage(Nom)(V)3.3
5
tpd @ Nom Voltage(Max), ns373737373737373737
tpd @ Nom Voltage(Max)(ns)37

Eco Plan

CD74HC74ECD74HC74EE4CD74HC74MCD74HC74M96CD74HC74M96E4CD74HC74M96G4CD74HC74ME4CD74HC74MTCD74HC74MTE4CD74HC74MTG4
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliantCompliantCompliantCompliant
Pb FreeYesYesNo

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, File published: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop

1-4 Layer PCBs $2