Datasheet Texas Instruments CD74HCT00

ManufacturerTexas Instruments
SeriesCD74HCT00
Datasheet Texas Instruments CD74HCT00

High Speed CMOS Logic Quad 2-Input NAND Gates

Datasheets

CD54HC00, CD74HC00, CD54HCT00, CD74HCT00 datasheet
PDF, 717 Kb, Revision: C, File published: Aug 21, 2003
Extract from the document

Prices

Status

CD74HCT00ECD74HCT00EE4CD74HCT00MCD74HCT00M96CD74HCT00M96E4CD74HCT00M96G4CD74HCT00ME4CD74HCT00MG4CD74HCT00MT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNo

Packaging

CD74HCT00ECD74HCT00EE4CD74HCT00MCD74HCT00M96CD74HCT00M96E4CD74HCT00M96G4CD74HCT00ME4CD74HCT00MG4CD74HCT00MT
Pin141414141414141414
Package TypeNNDDDDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525502500250025005050250
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&RTUBETUBESMALL T&R
Device MarkingCD74HCT00ECD74HCT00EHCT00MHCT00MHCT00MHCT00MHCT00MHCT00MHCT00M
Width (mm)6.356.353.913.913.913.913.913.913.91
Length (mm)19.319.38.658.658.658.658.658.658.65
Thickness (mm)3.93.91.581.581.581.581.581.581.58
Pitch (mm)2.542.541.271.271.271.271.271.271.27
Max Height (mm)5.085.081.751.751.751.751.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74HCT00E
CD74HCT00E
CD74HCT00EE4
CD74HCT00EE4
CD74HCT00M
CD74HCT00M
CD74HCT00M96
CD74HCT00M96
CD74HCT00M96E4
CD74HCT00M96E4
CD74HCT00M96G4
CD74HCT00M96G4
CD74HCT00ME4
CD74HCT00ME4
CD74HCT00MG4
CD74HCT00MG4
CD74HCT00MT
CD74HCT00MT
Bits444444444
F @ Nom Voltage(Max), Mhz252525252525252525
ICC @ Nom Voltage(Max), mA0.020.020.020.020.020.020.020.020.02
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-44/-44/-44/-44/-4
Package GroupPDIPPDIPSOICSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyHCTHCTHCTHCTHCTHCTHCTHCTHCT
VCC(Max), V5.55.55.55.55.55.55.55.55.5
VCC(Min), V4.54.54.54.54.54.54.54.54.5
Voltage(Nom), V555555555
tpd @ Nom Voltage(Max), ns252525252525252525

Eco Plan

CD74HCT00ECD74HCT00EE4CD74HCT00MCD74HCT00M96CD74HCT00M96E4CD74HCT00M96G4CD74HCT00ME4CD74HCT00MG4CD74HCT00MT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Application Notes

  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, File published: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Gate> NAND Gate

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