Datasheet MAX16152, MAX16153, MAX16154, MAX16155 (Maxim) - 3
| Manufacturer | Maxim |
| Description | nanoPower Supervisor and Watchdog Timer |
| Pages / Page | 20 / 3 — Absolute Maximum Ratings. Package Information 6 SOT23. Thermal … |
| File Format / Size | PDF / 473 Kb |
| Document Language | English |
Absolute Maximum Ratings. Package Information 6 SOT23. Thermal Resistance, Four-Layer Board:. 6 WLP
Model Line for this Datasheet
Text Version of Document
MAX16152/MAX16153/ nanoPower Supervisor and Watchdog Timer MAX16154/MAX16155
Absolute Maximum Ratings
VCC to GND .. -0.3V to +6V Continuous Power Dissipation (SOT23) (TA = +70°C, derate WDI, WD_EN to GND ... -0.3V to VCC + 0.3V 8.70mW/°C above +70°C) ..696mW WDO, RST to GND ... -0.3V to +6V Operating Temperature Range ...-40°C to +125°C Maximum Current, Any Pin (input/output) ... 20mA Junction Temperature ... +150°C Continuous Power Dissipation (WLP) (TA = +70°C, derate 10.5 mW/°C above +70°C) ... 840mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 6 SOT23
Package Code U6+1 Outline Number 21-0058 Land Pattern Number 90-0175
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 115 Junction-to-Case Thermal Resistance (θJC) 80
6 WLP
Package Code W60C1+2 Outline Number 21-100258 Land Pattern Number —
Thermal Resistance, Four-Layer Board:
Junction-to-Case Thermal Resistance (θJC) 95 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 3 Document Outline General Description Applications Benefits and Features Typical Application Circuit Absolute Maximum Ratings Package Information Electrical Characteristics Pin Configurations 6 WLP 6 SOT23 6 WLP 6 SOT23 Pin Description Functional Diagrams MAX16152/MAX16153 Block Diagram MAX16154/MAX16155 Block Diagram Detailed Description Input Threshold Watchdog Watchdog Startup Delay Watchdog Timeout Period Watchdog Enable Input (WD_EN) Watchdog Input Signal Reset Timeout Period Manual Reset Applications Information Power Supply Bypassing Watchdog Software Considerations Negative-Going VCC Transients Protection Selector Guide Ordering Information Revision History
Absolute Maximum Ratings
VCC to GND .. -0.3V to +6V Continuous Power Dissipation (SOT23) (TA = +70°C, derate WDI, WD_EN to GND ... -0.3V to VCC + 0.3V 8.70mW/°C above +70°C) ..696mW WDO, RST to GND ... -0.3V to +6V Operating Temperature Range ...-40°C to +125°C Maximum Current, Any Pin (input/output) ... 20mA Junction Temperature ... +150°C Continuous Power Dissipation (WLP) (TA = +70°C, derate 10.5 mW/°C above +70°C) ... 840mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 6 SOT23
Package Code U6+1 Outline Number 21-0058 Land Pattern Number 90-0175
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θJA) 115 Junction-to-Case Thermal Resistance (θJC) 80
6 WLP
Package Code W60C1+2 Outline Number 21-100258 Land Pattern Number —
Thermal Resistance, Four-Layer Board:
Junction-to-Case Thermal Resistance (θJC) 95 For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 3 Document Outline General Description Applications Benefits and Features Typical Application Circuit Absolute Maximum Ratings Package Information Electrical Characteristics Pin Configurations 6 WLP 6 SOT23 6 WLP 6 SOT23 Pin Description Functional Diagrams MAX16152/MAX16153 Block Diagram MAX16154/MAX16155 Block Diagram Detailed Description Input Threshold Watchdog Watchdog Startup Delay Watchdog Timeout Period Watchdog Enable Input (WD_EN) Watchdog Input Signal Reset Timeout Period Manual Reset Applications Information Power Supply Bypassing Watchdog Software Considerations Negative-Going VCC Transients Protection Selector Guide Ordering Information Revision History
