Datasheet SID1181KQ SCALE-iDriver (Power Integrations) - 3

ManufacturerPower Integrations
DescriptionUp to 8 A Single Channel 600 V / 650 V / 750 V IGBT/MOSFET Gate Drivers for Automotive Applications Providing Reinforced Galvanic Isolation
Pages / Page22 / 3 — SID1181KQ. SCALE-iDriver Functional Description. SCALE-iDriver. VCC. GND. …
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Document LanguageEnglish

SID1181KQ. SCALE-iDriver Functional Description. SCALE-iDriver. VCC. GND. Power Supplies. Input and Fault Logic (Primary-Side)

SID1181KQ SCALE-iDriver Functional Description SCALE-iDriver VCC GND Power Supplies Input and Fault Logic (Primary-Side)

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SID1181KQ SCALE-iDriver Functional Description SCALE-iDriver
The single channel SCALE-iDriver™ family is designed to drive IGBTs and MOSFETs or other semiconductor power switches with a blocking voltage of up to 750 V and provide reinforced isolation between R1
IN
micro-control er and the power semiconductor switch. The logic input (PWM) command signals applied via the IN pin and the primary R2 supply voltage supplied via the VCC pin are both referenced to the
SO
GND pin. The working status of the power semiconductor switch and SCALE-iDriver is monitored via the SO pin. RSO
VCC
PMW command signals are transferred from the primary (IN) to secondary-side via FluxLink isolation technology. The GH pin supplies C1 a positive gate voltage and charges the semiconductor gate during
GND
the turn-on process. The GL pin supplies the negative voltage and discharges the gate during the turn-off process. Short-circuit protection is implemented using a desaturation detection technique monitored via the VCE pin. When the SCALE-iDriver detects PI-7950-050916 a short-circuit, the semiconductor turn-off process is activated Figure 5. Increased Threshold Voltages V and V . For R = 3.3 kW and using an Advanced Soft Shut Down (ASSD) technique. IN+LT IN+HT 1 R = 1 kW the IN Logic Level is 15 V. 2
Power Supplies
The SID1181KQ requires two power supplies. One is the primary-side connected together. Note: The SCALE-iDriver data sheet defines the (V ) which powers the primary-side logic and communication with R and R values as total resistances connected to the respective VCC GH GL the secondary (insulated) side. Another supply voltage is required for pins GH and GL. Note that most power semiconductor data sheets the secondary-side, V is applied between the VISO pin and the specify an internal gate resistor R which is already integrated into TOT GINT COM pin. V needs to be insulated from the primary-side and must the power semiconductor switch. In Addition to R , external TOT GINT provide at least the same insulation capabilities as the SCALE-iDriver. resistor devices R and R are specified to setup the gate current GON GOFF V must have a low capacitive coupling to the primary or any other levels to the application requirements. Consequently, R is the sum TOT GH secondary-side. The positive gate-emitter voltage V is provided by of R and R , as shown in Figures 9 and 10. Careful consideration VISO GON GINT VISO which is internal y generated and stabilized to 15 V (typical y) should be given to the power dissipation and peak current associated with respect to VEE. The negative gate-emitter voltage V is with the external gate resistors. VEE provided by VEE with respect to COM. Due to the limited current The GH pin output current source (I ) of SID1181KQ is capable of sourcing capabilities of the VEE pin, any additional load needs to be GH handling up to 7.3 A during turn-on, and the GL pin output current applied between the VISO and COM pins. No additional load between source (I ) is able to sink up to 8.0 A during turn-off. The SCALE- VISO and VEE pins or between VEE and COM pins is al owed. GL iDriver’s internal resistances are described as R and R GHI GLI
Input and Fault Logic (Primary-Side)
respectively. If the gate resistors for SCALE-iDriver family attempt to The input (IN) and output (SO) logic is designed to work directly with draw a higher peak current, the peak current will be internal y limited micro-control ers using 5 V CMOS logic. If the physical distance to a safe value, see Figures 6 and 7. Figure 8 shows the peak current between the control er and the SCALE-iDriver is large or if a different that can be achieved for a given supply voltage for same gate resistor logic level is required the resistive divider in Figure 5, or Schmitt-trigger values, load capacitance and layout design. ICs (Figures 13 and 14) can be used. Both solutions adjust the logic level as necessary and will also improve the driver’s noise immunity. 9 Gate driver commands are transferred from the IN pin to the GH and
)
8 GL pins with a propagation delay t and t .
(A
P(LH) P(HL) During normal operation, when there is no fault detected, the SO pin
GH
-7910-121516
I
7 PI stays at high impedance (open). Any fault is reported by connecting the SO pin to GND. The SO pin stays low as long as the V voltage 6 VCC (primary-side) stays below UVLO , where the propagation delay is VCC negligible. If desaturation is detected (there is a short-circuit), or the
e Current
5 supply voltages V , V , (secondary-side) drop below UVLO , VISO VEE VISO UVLO , the SO status changes with a delay time t and keeps 4 VEE FAULT status low for a time defined as t . In case of a fault condition the SO driver applies the off-state (the GL pin is connected to COM). During 3 the t period, command signal transitions from the IN pin are R SO GH = 4 Ω, RGL = 3.4 Ω, CLOAD = 47 nF ignored. A new turn-on command transition is required before the 2 RGH = 4 Ω, RGL = 3.4 Ω, CLOAD = 100 nF driver will enter the on-state. RGH = RGL = 0 Ω, CLOAD = 47 nF The SO pin current is defined as I ; voltage during low status is 1
Turn-On Peak Gat
SO defined as V . SO(FAULT) 0
Output (Secondary-Side)
-60 -40 -20 0 20 40 60 80 100 120 140 The gate of the power semiconductor switch to be driven can be connected to the SCALE-iDriver output via pins GH and GL, using two
Ambient Temperature (
°
C)
different resistor values. Turn-on gate resistor R needs to be Figure 6. Turn-On Peak Output Current (Source) vs. Ambient Temperature. GON connected to the GH pin and turn-off gate resistor R to the GL pin. Conditions: VCC = 5 V, V = 25 V, f = 20 kHz, Duty Cycle = 50%. GOFF TOT S If both gate resistors have the same value, the GL and GH pins can be
3
Rev. B 09/19 www.power.com Document Outline Product Highlights Description Product Portfolio Pin Functional Description SCALE-iDriver Functional Description Application Examples and Components Selection Power Dissipation and IC Junction Temperature Estimation Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics eSOP-R16B Package Drawing MSL Table ESD and Latch-Up Table IEC 60664-1 Rating Table Electrical Characteristics (EMI) Table Regulatory Information Table Part Ordering Information
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