Datasheet SID1181KQ SCALE-iDriver (Power Integrations) - 4
| Manufacturer | Power Integrations |
| Description | Up to 8 A Single Channel 600 V / 650 V / 750 V IGBT/MOSFET Gate Drivers for Automotive Applications Providing Reinforced Galvanic Isolation |
| Pages / Page | 22 / 4 — SID1181KQ. rent. e Cur. Current. Gate Peak. Turn-Off Peak Gat. Ambient … |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
SID1181KQ. rent. e Cur. Current. Gate Peak. Turn-Off Peak Gat. Ambient Temperature (. Secondary-Side Total Supply Voltage – VTOT (V)
Model Line for this Datasheet
Text Version of Document
SID1181KQ
0 7
)
-1
(A
R 6 GH = 4 Ω, RGL = 3.4 Ω, CLOAD = 47 nF
GL
-7912-042816
I
-2 R -7911-042816 GH = 4 Ω, RGL = 3.4 Ω, CLOAD = 100 nF PI
)
PI RGH = RGL = 0 Ω, CLOAD = 47 nF -3
(A
5
rent
-4 4
e Cur
-5
Current
3 -6 -7 2
Gate Peak
IGH, Turn-On Peak Gate Current -8 IGL, Turn-Off Peak Gate Current 1
Turn-Off Peak Gat
-9 -10 0 -60 -40 -20 0 20 40 60 80 100 120 140 20 21 22 23 24 25 26 27 28 29 30
Ambient Temperature (
°
C) Secondary-Side Total Supply Voltage – VTOT (V)
Figure 7. Turn-Off Peak Output Current (Sink) vs. Ambient Temperature. Figure 8. Turn-On and Turn-Off Peak Output Current vs. Secondary-Side Total Conditions: VVCC = 5 V, V = 25 V, f = 20 kHz, Duty Cycle = 50%. Supply Voltage (V ). Conditions: V TOT S TOT VCC = 5 V, TJ = 25 °C, RGH = 4 W, RGL = 3.4 W, CLOAD = 100 nF, fS = 1 kHz, Duty Cycle = 50%.
Short-Circuit Protection
The SCALE-iDriver uses the semiconductor desaturation effect to detect short-circuits and protects the device against damage by
SCALE-iDriver
employing an Advanced Soft Shut Down (ASSD) technique. Desaturation can be detected using two different circuits, either with R R VCE VCEX
VCE
diode sense circuitry D (Figure 10) or with resistors R (Figure 9). VCE VCEX With the help of a wel stabilized V and a Schottky diode (D ) VISO STO connected between semiconductor gate and VISO pin the short-
VGXX
CRES DCL circuit current value can be limited to a safe value. CGXX During the off-state, the VCE pin is internal y connected to the COM
VISO
pin and C is discharged (red curve in Figure 11 represents the D RES STO R potential of the VCE pin). When the power semiconductor switch
GH
GON Collector receives a turn-on command, the col ector-emitter voltage (V ) CE Gate RGINT decreases from the off-state level same as the DC-link voltage to a RGOFF
GL
normal y much lower on-state level (see blue curve in Figure 11) and C begins to be charged up to the V saturation level (V ). C Emitter RES CE CE SAT RES charging time depends on the resistance of R (Figure 9), DC-link
VEE
VCEX voltage and C and R value. The V voltage during on-state is RES VCE CE continuously observed and compared with a reference voltage, V .
COM
DES The V level is optimized for IGBT applications. As soon as V >V DES CE DES (red circle in Figure 11), the driver turns off the power semiconductor switch with a control ed col ector current slope, limiting the V CE PI-7952-080416 overvoltage excursions to below the maximum col ector-emitter voltage (V ). Turn-on commands during this time and during t CES SO Figure 9. Short-Circuit Protection using Resistors Chain R . are ignored, and the SO pin is connected to GND. VCEX The response time t is the C charging time and describes the and power-down. Any supply voltage related to VCC, VISO, VEE and RES RES delay between V asserting and the voltage on the VCE pin rising VGXX pins should be stabilized using ceramic capacitors C , C , C , CE 1 S1X S2X (see Figure 11). Response time should be long enough to avoid false C respectively as shown in Figures 13 and 14. After supply GXX tripping during semiconductor turn-on and is adjustable via R and voltages reach their nominal values, the driver will begin to function RES C (Figure 10) or R and C (Figure 9) values. It should not be after a time delay t . RES VCE RES START longer than the period al owed by the semiconductor manufacturer.
Short-Pulse Operation Safe Power-Up and Power-Down
If command signals applied to the IN pin are shorter than the minimum During driver power-up and power-down, several unintended input / specified by t , the SCALE-iDriver output signals, GH and GL pins, GE(MIN) output states may occur. In order to avoid these effects, it is will be extended to value t . The duration of pulses longer than GE(MIN) recommended that the IN pin is kept at logic low during power-up t will not be changed. GE(MIN)
4
Rev. B 09/19 www.power.com Document Outline Product Highlights Description Product Portfolio Pin Functional Description SCALE-iDriver Functional Description Application Examples and Components Selection Power Dissipation and IC Junction Temperature Estimation Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics eSOP-R16B Package Drawing MSL Table ESD and Latch-Up Table IEC 60664-1 Rating Table Electrical Characteristics (EMI) Table Regulatory Information Table Part Ordering Information
0 7
)
-1
(A
R 6 GH = 4 Ω, RGL = 3.4 Ω, CLOAD = 47 nF
GL
-7912-042816
I
-2 R -7911-042816 GH = 4 Ω, RGL = 3.4 Ω, CLOAD = 100 nF PI
)
PI RGH = RGL = 0 Ω, CLOAD = 47 nF -3
(A
5
rent
-4 4
e Cur
-5
Current
3 -6 -7 2
Gate Peak
IGH, Turn-On Peak Gate Current -8 IGL, Turn-Off Peak Gate Current 1
Turn-Off Peak Gat
-9 -10 0 -60 -40 -20 0 20 40 60 80 100 120 140 20 21 22 23 24 25 26 27 28 29 30
Ambient Temperature (
°
C) Secondary-Side Total Supply Voltage – VTOT (V)
Figure 7. Turn-Off Peak Output Current (Sink) vs. Ambient Temperature. Figure 8. Turn-On and Turn-Off Peak Output Current vs. Secondary-Side Total Conditions: VVCC = 5 V, V = 25 V, f = 20 kHz, Duty Cycle = 50%. Supply Voltage (V ). Conditions: V TOT S TOT VCC = 5 V, TJ = 25 °C, RGH = 4 W, RGL = 3.4 W, CLOAD = 100 nF, fS = 1 kHz, Duty Cycle = 50%.
Short-Circuit Protection
The SCALE-iDriver uses the semiconductor desaturation effect to detect short-circuits and protects the device against damage by
SCALE-iDriver
employing an Advanced Soft Shut Down (ASSD) technique. Desaturation can be detected using two different circuits, either with R R VCE VCEX
VCE
diode sense circuitry D (Figure 10) or with resistors R (Figure 9). VCE VCEX With the help of a wel stabilized V and a Schottky diode (D ) VISO STO connected between semiconductor gate and VISO pin the short-
VGXX
CRES DCL circuit current value can be limited to a safe value. CGXX During the off-state, the VCE pin is internal y connected to the COM
VISO
pin and C is discharged (red curve in Figure 11 represents the D RES STO R potential of the VCE pin). When the power semiconductor switch
GH
GON Collector receives a turn-on command, the col ector-emitter voltage (V ) CE Gate RGINT decreases from the off-state level same as the DC-link voltage to a RGOFF
GL
normal y much lower on-state level (see blue curve in Figure 11) and C begins to be charged up to the V saturation level (V ). C Emitter RES CE CE SAT RES charging time depends on the resistance of R (Figure 9), DC-link
VEE
VCEX voltage and C and R value. The V voltage during on-state is RES VCE CE continuously observed and compared with a reference voltage, V .
COM
DES The V level is optimized for IGBT applications. As soon as V >V DES CE DES (red circle in Figure 11), the driver turns off the power semiconductor switch with a control ed col ector current slope, limiting the V CE PI-7952-080416 overvoltage excursions to below the maximum col ector-emitter voltage (V ). Turn-on commands during this time and during t CES SO Figure 9. Short-Circuit Protection using Resistors Chain R . are ignored, and the SO pin is connected to GND. VCEX The response time t is the C charging time and describes the and power-down. Any supply voltage related to VCC, VISO, VEE and RES RES delay between V asserting and the voltage on the VCE pin rising VGXX pins should be stabilized using ceramic capacitors C , C , C , CE 1 S1X S2X (see Figure 11). Response time should be long enough to avoid false C respectively as shown in Figures 13 and 14. After supply GXX tripping during semiconductor turn-on and is adjustable via R and voltages reach their nominal values, the driver will begin to function RES C (Figure 10) or R and C (Figure 9) values. It should not be after a time delay t . RES VCE RES START longer than the period al owed by the semiconductor manufacturer.
Short-Pulse Operation Safe Power-Up and Power-Down
If command signals applied to the IN pin are shorter than the minimum During driver power-up and power-down, several unintended input / specified by t , the SCALE-iDriver output signals, GH and GL pins, GE(MIN) output states may occur. In order to avoid these effects, it is will be extended to value t . The duration of pulses longer than GE(MIN) recommended that the IN pin is kept at logic low during power-up t will not be changed. GE(MIN)
4
Rev. B 09/19 www.power.com Document Outline Product Highlights Description Product Portfolio Pin Functional Description SCALE-iDriver Functional Description Application Examples and Components Selection Power Dissipation and IC Junction Temperature Estimation Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics eSOP-R16B Package Drawing MSL Table ESD and Latch-Up Table IEC 60664-1 Rating Table Electrical Characteristics (EMI) Table Regulatory Information Table Part Ordering Information
