Datasheet TLP5814H (Toshiba) - 6

TLP5814H 11. Isolation Characteristics (Unless otherwise specified, Ta = 25 �) Characteristics Symbol Note Test Condition Min Typ. Max Unit Total capacitance (input to output) CS (Note 1) VS = 0 V, f = 1 MHz � 1.0 � pF Isolation resistance RS (Note 1) VS = 500 V, R.H. ≤ 60 % 1012 1014 � Ω Isolation voltage BVS (Note 1) AC, 60 s 5000 � � Vrms Note 1: This device is considered as a two-terminal device: All pins on the LED side are shorted together, and all pins on the Output IC side are shorted together. 12. Switching Characteristics (Note) (Unless otherwise specified, Ta = -40 to 125 �) Test Characteristics Symbol Note Test Condition Min Typ. Max Unit Circuit Propagation delay time (L/H) tpLH (Note 1) Fig. IF = 0 → 4.5 mA, VCC = 15 V, � 70 150 ns 13.1.8 Rg = 10 Ω, Cg = 3 nF IF = 0 → 4.5 mA, VCC = 23 V, � 71 150 Rg = 10 Ω, Cg = 10 nF Propagation delay time (H/L) tpHL IF = 4.5 → 0 mA, VCC = 15 V, � 78 130 Rg = 10 Ω, Cg = 3 nF IF = 4.5 → 0 mA, VCC = 23 V, � 79 130 Rg = 10 Ω, Cg = 10 nF Rise time tr IF = 0 → 4.5 mA, VCC = 15 V, � 5.1 � Rg = 10 Ω, Cg = 3 nF IF = 0 → 4.5 mA, VCC = 23 V, � 6.8 � Rg = 10 Ω, Cg = 10 nF Fall time tf IF = 4.5 → 0 mA, VCC = 15 V, � 3.2 � Rg = 10 Ω, Cg = 3 nF IF = 4.5 → 0 mA, VCC = 23 V, � 3.9 � Rg = 10 Ω, Cg = 10 nF Pulse width distortion |tpHL-tpLH| IF = 0 ←→ 4.5 mA, VCC = 15 V, � 8 40 Rg = 10 Ω, Cg = 3 nF IF = 0 ←→ 4.5 mA, VCC = 23 V, � 8 40 Rg = 10 Ω, Cg = 10 nF Propagation delay skew tpsk (Note 1), IF = 0 ←→ 4.5 mA, VCC = 15 V, -80 � 80 (device to device) (Note 2) Rg = 10 Ω, Cg = 3 nF IF = 0 ←→ 4.5 mA, VCC = 23 V, -80 � 80 Rg = 10 Ω, Cg = 10 nF High-level common-mode CMH (Note 3) Fig. VCM = 1500 Vp-p, IF = 4.5 mA, ±70 � � kV/µs transient immunity 13.1.9 VCC - VEE = 23 V, Ta = 25 �, VO(min) = 19 V Low-level common-mode CML (Note 4) VCM = 1500 Vp-p, IF = 0 mA, ±70 � � transient immunity VCC - VEE = 23 V, Ta = 25 �, VO(max) = 1 V Note: All typical values are at Ta = 25 �. Note 1: Input signal duty = 50 %, tr = tf = 5 ns or less Note 2: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc). Note 3: CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic high state (VO > 19 V). Note 4: CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic low state (VO < 1 V). ©2023-2025 6 2025-02-03 Toshiba Electronic Devices & Storage Corporation Rev.4.0