Datasheet TEA5767HN (NXP) - 9
| Manufacturer | NXP |
| Description | Low-power FM stereo radio for handheld applications in 40-VFQFN Exposed Pad package |
| Pages / Page | 40 / 9 — NXP Semiconductors. TEA5767HN. Low-power FM stereo radio for handheld … |
| File Format / Size | PDF / 201 Kb |
| Document Language | English |
NXP Semiconductors. TEA5767HN. Low-power FM stereo radio for handheld applications. Fig 3. Flowchart auto search or preset
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NXP Semiconductors TEA5767HN Low-power FM stereo radio for handheld applications
Power on: Mute, stand-by activated All other status is random Complete initialization by microprocessor is required no Write enable activated? yes Reset bit counter: Bits are clocked into the receive register Completed bytes are written to the destinastion register Use value of tuning memory: Write result to the programmable divider (also available at the bus) Wait 10 ms. Have the signal level available at the bus Search no Mode? yes no Signal level OK? yes Reset IF counter and enable counting Wait for result Have the result available for the bus Search yes Mode? Search no no no IF frequency upwards? OK? yes yes Add 100 kHz to the tuning memory Substract 100 kHz to the tuning memory Set 'found' flag Upper Lower yes tuning limit tuning limit exceeded? exceeded? no no Set 'band limit' flag 001aae346
Fig 3. Flowchart auto search or preset
TEA5767HN_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 26 January 2007 9 of 40
Document Outline 1. General description 2. Features 3. Quick reference data 4. Ordering information 5. Block diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 7.1 Low-noise RF amplifier 7.2 FM mixer 7.3 VCO 7.4 Crystal oscillator 7.5 PLL tuning system 7.6 RF AGC 7.7 IF filter 7.8 FM demodulator 7.9 Level voltage generator and analog-to-digital converter 7.10 IF counter 7.11 Soft mute 7.12 MPX decoder 7.13 Signal dependent mono to stereo blend 7.14 Signal dependent AF response 7.15 Software programmable ports 7.16 I2C-bus and 3-wire bus 8. I2C-bus, 3-wire bus and bus-controlled functions 8.1 I2C-bus specification 8.1.1 Data transfer 8.1.2 Power-on reset 8.2 I2C-bus protocol 8.3 3-wire bus specification 8.3.1 Data transfer 8.3.2 Power-on reset 8.4 Writing data 8.5 Reading data 9. Internal circuitry 10. Limiting values 11. Thermal characteristics 12. Static characteristics 13. Dynamic characteristics 14. FM characteristics 15. I2C-bus characteristics 16. Test information 17. Package outline 18. Soldering 18.1 Introduction to soldering 18.2 Wave and reflow soldering 18.3 Wave soldering 18.4 Reflow soldering 19. Revision history 20. Legal information 20.1 Data sheet status 20.2 Definitions 20.3 Disclaimers 20.4 Trademarks 21. Contact information 22. Contents
Power on: Mute, stand-by activated All other status is random Complete initialization by microprocessor is required no Write enable activated? yes Reset bit counter: Bits are clocked into the receive register Completed bytes are written to the destinastion register Use value of tuning memory: Write result to the programmable divider (also available at the bus) Wait 10 ms. Have the signal level available at the bus Search no Mode? yes no Signal level OK? yes Reset IF counter and enable counting Wait for result Have the result available for the bus Search yes Mode? Search no no no IF frequency upwards? OK? yes yes Add 100 kHz to the tuning memory Substract 100 kHz to the tuning memory Set 'found' flag Upper Lower yes tuning limit tuning limit exceeded? exceeded? no no Set 'band limit' flag 001aae346
Fig 3. Flowchart auto search or preset
TEA5767HN_5 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 05 — 26 January 2007 9 of 40
Document Outline 1. General description 2. Features 3. Quick reference data 4. Ordering information 5. Block diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 7.1 Low-noise RF amplifier 7.2 FM mixer 7.3 VCO 7.4 Crystal oscillator 7.5 PLL tuning system 7.6 RF AGC 7.7 IF filter 7.8 FM demodulator 7.9 Level voltage generator and analog-to-digital converter 7.10 IF counter 7.11 Soft mute 7.12 MPX decoder 7.13 Signal dependent mono to stereo blend 7.14 Signal dependent AF response 7.15 Software programmable ports 7.16 I2C-bus and 3-wire bus 8. I2C-bus, 3-wire bus and bus-controlled functions 8.1 I2C-bus specification 8.1.1 Data transfer 8.1.2 Power-on reset 8.2 I2C-bus protocol 8.3 3-wire bus specification 8.3.1 Data transfer 8.3.2 Power-on reset 8.4 Writing data 8.5 Reading data 9. Internal circuitry 10. Limiting values 11. Thermal characteristics 12. Static characteristics 13. Dynamic characteristics 14. FM characteristics 15. I2C-bus characteristics 16. Test information 17. Package outline 18. Soldering 18.1 Introduction to soldering 18.2 Wave and reflow soldering 18.3 Wave soldering 18.4 Reflow soldering 19. Revision history 20. Legal information 20.1 Data sheet status 20.2 Definitions 20.3 Disclaimers 20.4 Trademarks 21. Contact information 22. Contents