Datasheet 2N5060, 2N5061, 2N5062, 2N5064 (ON Semiconductor)
| Manufacturer | ON Semiconductor |
| Description | Sensitive Gate Silicon Controlled Rectifiers 0.8 A RMS in TO-92 package |
| Pages / Page | 9 / 1 — DATA SHEET. www.onsemi.com. SILICON CONTROLLED. RECTIFIERS. Reverse … |
| File Format / Size | PDF / 208 Kb |
| Document Language | English |
DATA SHEET. www.onsemi.com. SILICON CONTROLLED. RECTIFIERS. Reverse Blocking Thyristors. 0.8 A RMS, 30 − 200 V. MARKING. DIAGRAM
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DATA SHEET www.onsemi.com
Sensitive Gate Silicon Controlled Rectifiers
SILICON CONTROLLED RECTIFIERS Reverse Blocking Thyristors 0.8 A RMS, 30 − 200 V
2N5060 Series Annular PNPN devices designed for high volume consumer G applications such as relay and lamp drivers, small motor controls, gate A K drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO−92/TO-226AA package which is readily adaptable for use in automatic insertion equipment.
MARKING DIAGRAM Features
• Sensitive Gate Trigger Current − 200 mA Maximum • Low Reverse and Forward Blocking Current − 50 mA Maximum, 2N T 50xx C = 110°C
TO−92
• YWW Low Holding Current − 5 mA Maximum
CASE 29
• Passivated Surface for Reliability and Uniformity
STYLE 10
• 1 These are Pb−Free Devices 2 3
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted) 50xx Specific Device Code
Rating Symbol Value Unit
Y = Year Peak Repetitive Off−State Voltage (Note 1) VDRM, V WW = Work Week (TJ = *40 to 110°C, Sine Wave, VRRM 50 to 60 Hz, RGK = 1 kW) 2N5060 30 2N5061 60 2N5062 100
PIN ASSIGNMENT
2N5064 200 1 Cathode On-State Current RMS IT(RMS) 0.8 A 2 Gate (180° Conduction Angles; TC = 80°C) 3 Anode *Average On-State Current IT(AV) A (180° Conduction Angles) (TC = 67°C) 0.51 (TC = 102°C) 0.255 *Peak Non-repetitive Surge Current, ITSM 10 A
ORDERING INFORMATION
TA = 25°C (1/2 cycle, Sine Wave, 60 Hz) See detailed ordering and shipping information in the package Circuit Fusing Considerations (t = 8.3 ms) I2t 0.4 A2s dimensions section on page 6 of this data sheet. *Average On-State Current IT(AV) A (180° Conduction Angles) (TC = 67°C) 0.51 (TC = 102°C) 0.255 *Forward Peak Gate Power PGM 0.1 W (Pulse Width v 1.0 msec; TA = 25°C) *Forward Average Gate Power PG(AV) 0.01 W (TA = 25°C, t = 8.3 ms) *Forward Peak Gate Current IGM 1.0 A (Pulse Width v 1.0 msec; TA = 25°C) *Reverse Peak Gate Voltage VRGM 5.0 V (Pulse Width v 1.0 msec; TA = 25°C) *Operating Junction Temperature Range TJ −40 to +110 °C *Storage Temperature Range Tstg −40 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *Indicates JEDEC Registered Data. © Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
October, 2024 − Rev. 11 2N5060/D
DATA SHEET www.onsemi.com
Sensitive Gate Silicon Controlled Rectifiers
SILICON CONTROLLED RECTIFIERS Reverse Blocking Thyristors 0.8 A RMS, 30 − 200 V
2N5060 Series Annular PNPN devices designed for high volume consumer G applications such as relay and lamp drivers, small motor controls, gate A K drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO−92/TO-226AA package which is readily adaptable for use in automatic insertion equipment.
MARKING DIAGRAM Features
• Sensitive Gate Trigger Current − 200 mA Maximum • Low Reverse and Forward Blocking Current − 50 mA Maximum, 2N T 50xx C = 110°C
TO−92
• YWW Low Holding Current − 5 mA Maximum
CASE 29
• Passivated Surface for Reliability and Uniformity
STYLE 10
• 1 These are Pb−Free Devices 2 3
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted) 50xx Specific Device Code
Rating Symbol Value Unit
Y = Year Peak Repetitive Off−State Voltage (Note 1) VDRM, V WW = Work Week (TJ = *40 to 110°C, Sine Wave, VRRM 50 to 60 Hz, RGK = 1 kW) 2N5060 30 2N5061 60 2N5062 100
PIN ASSIGNMENT
2N5064 200 1 Cathode On-State Current RMS IT(RMS) 0.8 A 2 Gate (180° Conduction Angles; TC = 80°C) 3 Anode *Average On-State Current IT(AV) A (180° Conduction Angles) (TC = 67°C) 0.51 (TC = 102°C) 0.255 *Peak Non-repetitive Surge Current, ITSM 10 A
ORDERING INFORMATION
TA = 25°C (1/2 cycle, Sine Wave, 60 Hz) See detailed ordering and shipping information in the package Circuit Fusing Considerations (t = 8.3 ms) I2t 0.4 A2s dimensions section on page 6 of this data sheet. *Average On-State Current IT(AV) A (180° Conduction Angles) (TC = 67°C) 0.51 (TC = 102°C) 0.255 *Forward Peak Gate Power PGM 0.1 W (Pulse Width v 1.0 msec; TA = 25°C) *Forward Average Gate Power PG(AV) 0.01 W (TA = 25°C, t = 8.3 ms) *Forward Peak Gate Current IGM 1.0 A (Pulse Width v 1.0 msec; TA = 25°C) *Reverse Peak Gate Voltage VRGM 5.0 V (Pulse Width v 1.0 msec; TA = 25°C) *Operating Junction Temperature Range TJ −40 to +110 °C *Storage Temperature Range Tstg −40 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *Indicates JEDEC Registered Data. © Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
October, 2024 − Rev. 11 2N5060/D