Datasheet Texas Instruments TL081

ManufacturerTexas Instruments
SeriesTL081
Datasheet Texas Instruments TL081

JFET-Input Operational Amplifier

Datasheets

TL08xx JFET-Input Operational Amplifiers datasheet
PDF, 2.5 Mb, Revision: I, File published: May 27, 2015
Extract from the document

Prices

China PCB Prototype and Fabrication Manufacturer

Status

TL081CDTL081CDRTL081CPTL081CPE4TL081CPSRTL081CPWLETL081IDTL081IDG4TL081IDRTL081IDRE4TL081IDRG4TL081IPTL081MFKBTL081MJGTL081MJGB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Obsolete (Manufacturer has discontinued the production of the device)Obsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityYesNoNoNoNoNoNoNoNoNoNoNoNoNoNo

Packaging

TL081CDTL081CDRTL081CPTL081CPE4TL081CPSRTL081CPWLETL081IDTL081IDG4TL081IDRTL081IDRE4TL081IDRG4TL081IPTL081MFKBTL081MJGTL081MJGB
Pin8888888888882088
Package TypeDDPPPSPWDDDDDPFKJGJG
Industry STD TermSOICSOICPDIPPDIPSOPTSSOPSOICSOICSOICSOICSOICPDIPLCCCCDIPCDIP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TS-CQCC-NR-GDIP-TR-GDIP-T
Package QTY75250050502000757525002500250050
CarrierTUBELARGE T&RTUBETUBELARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&RTUBE
Width (mm)3.913.916.356.355.34.43.913.913.913.913.916.358.896.676.67
Length (mm)4.94.99.819.816.234.94.94.94.94.99.818.899.69.6
Thickness (mm)1.581.583.93.91.9511.581.581.581.581.583.91.834.574.57
Pitch (mm)1.271.272.542.541.27.651.271.271.271.271.272.541.272.542.54
Max Height (mm)1.751.755.085.0821.21.751.751.751.751.755.082.035.085.08
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsTL081CD
TL081CD
TL081CDR
TL081CDR
TL081CP
TL081CP
TL081CPE4
TL081CPE4
TL081CPSR
TL081CPSR
TL081CPWLE
TL081CPWLE
TL081ID
TL081ID
TL081IDG4
TL081IDG4
TL081IDR
TL081IDR
TL081IDRE4
TL081IDRE4
TL081IDRG4
TL081IDRG4
TL081IP
TL081IP
TL081MFKB
TL081MFKB
TL081MJG
TL081MJG
TL081MJGB
TL081MJGB
Additional FeaturesVos Adj PinVos Adj PinVos Adj PinVos Adj Pin
Approx. Price (US$)0.12 | 1ku0.12 | 1ku0.12 | 1ku0.12 | 1ku
ArchitectureFETFETFETFETFETFETFETFETFETFETFETFETFETFETFET
CMRR(Min), dB7070707070707070707070
CMRR(Min)(dB)70707070
CMRR(Typ), dB8686868686868686868686
CMRR(Typ)(dB)86868686
FeaturesN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A
GBW(Typ), MHz33333333333
GBW(Typ)(MHz)3333
Input Bias Current(Max), pA200200200200200200200200200200200
Input Bias Current(Max)(pA)200200200200
Iq per channel(Max), mA2.82.82.82.82.82.82.82.82.82.82.8
Iq per channel(Max)(mA)2.82.82.82.8
Iq per channel(Typ), mA1.41.41.41.41.41.41.41.41.41.41.4
Iq per channel(Typ)(mA)1.41.41.41.4
Number of Channels11111111111
Number of Channels(#)1111
Offset Drift(Typ), uV/C1818181818181818181818
Offset Drift(Typ)(uV/C)18181818
Operating Temperature Range, C-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70
Operating Temperature Range(C)-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
Output Current(Typ), mA1010101010101010101010
Output Current(Typ)(mA)10101010
Package GroupSOICSOICPDIPPDIPSOSOSOICSOICSOICSOICSOICPDIPPDIP
SO
SOIC
PDIP
SO
SOIC
PDIP
SO
SOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)8SO: 48 mm2: 7.8 x 6.2(SO)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)
Package Size: mm2:W x L (PKG)See datasheet (CDIP)
See datasheet (PDIP)
See datasheet (CDIP)
See datasheet (PDIP)
See datasheet (CDIP)
See datasheet (PDIP)
See datasheet (CDIP)
See datasheet (PDIP)
Rail-to-RailIn to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+In to V+
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us1313131313131313131313
Slew Rate(Typ)(V/us)13131313
Total Supply Voltage(Max), +5V=5, +/-5V=103636363636363636363636
Total Supply Voltage(Max)(+5V=5, +/-5V=10)36363636
Total Supply Voltage(Min), +5V=5, +/-5V=1077777777777
Total Supply Voltage(Min)(+5V=5, +/-5V=10)7777
Vn at 1kHz(Typ), nV/rtHz1818181818181818181818
Vn at 1kHz(Typ)(nV/rtHz)18181818
Vos (Offset Voltage @ 25C)(Max), mV66666666666
Vos (Offset Voltage @ 25C)(Max)(mV)6666

Eco Plan

TL081CDTL081CDRTL081CPTL081CPE4TL081CPSRTL081CPWLETL081IDTL081IDG4TL081IDRTL081IDRE4TL081IDRG4TL081IPTL081MFKBTL081MJGTL081MJGB
RoHSCompliantCompliantCompliantCompliantCompliantNot CompliantCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantNot CompliantNot Compliant
Pb FreeYesYesNoYesNoNoNo

Application Notes

  • Stability Analysis Of Voltage-Feedback Op Amps Including Compensation Technique (Rev. A)
    PDF, 197 Kb, Revision: A, File published: Mar 12, 2001
    This report presents an analysis of the stability of voltage-feedback operational amplifiers (op amps) using circuit performance as the criteria to attain a successful design. It discusses several compensation techniques for op amps with and without internal compensation.
  • Compensation Methodology for Error in SK Low-Pass Filter Caused by Limited GBW
    PDF, 261 Kb, File published: Jul 18, 2017
    This application report provides a tutorial description of the error analysis for the Sallen-Key active low-pass filter.Additionally the report introduces a new compensation method to reduce the errors caused by the limitedgain-bandwidth of an op amp. Simulation and test data which demonstrate the performance achieved with thiscompensation technique are presented.

Model Line

Manufacturer's Classification

  • Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > General-Purpose Op Amps