Datasheet MCP6V51 (Microchip)
| Manufacturer | Microchip |
| Description | The MCP6V51 operational amplifier provides input offset voltage correction for very low offset and offset drift |
| Pages / Page | 43 / 1 — MCP6V51. 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering. Features. … |
| File Format / Size | PDF / 3.6 Mb |
| Document Language | English |
MCP6V51. 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering. Features. General Description. Package Types. Typical Applications
Text Version of Document
MCP6V51 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering Features General Description
• High DC Precision: The Microchip Technology Inc. MCP6V51 operational - V amplifier employs dynamic offset correction for very OS Drift: 36 nV/°C (max.) - V low offset and offset drift. The device has a gain OS: 15 µV (max.) bandwidth product of 2 MHz (typical). It is unity-gain - Open-Loop Gain: 140 dB (min.) stable, has virtually no 1/f noise and excel ent Power - PSRR: 134 dB (min.) Supply Rejection Ratio (PSRR) and Common Mode - CMRR: 135 dB (min.) Rejection Ratio (CMRR). The product operates with a • Low Noise: single supply voltage that can range from 4.5V to 45V, - 10.2 nV/√ Hz at 1 kHz (±2.25V to ±22.5V), while drawing 470 µA (typical) of quiescent current. - Eni: 0.21 µVP-P, f = 0.1 Hz to 10 Hz • Low Power: The MCP6V51 op amp is offered as a single-channel amplifier and is designed using an advanced CMOS - IQ: 470 µA/amplifier (typ.) process. - Wide Supply Voltage Range: 4.5V to 45V • Easy to Use:
Package Types
- Input Range incl. Negative Rail - Rail-to-Rail Output - EMI Filtered Inputs
MCP6V51 MCP6V51
- Gain Bandwidth Product: 2 MHz SOT-23-5 MSOP-8 - Slew Rate 1.2V/µs NC - Unity Gain Stable VOUT 1 5 VDD NC 1 8 V • Smal Packages: 5-Lead SOT23, 8-Lead MSOP V 2 7 SS 2 VIN– DD V V • Extended Temperature Range: -40°C to +125°C V 3 6 IN+ 3 4 VIN– IN+ OUT VSS 4 5 NC
Typical Applications
• Industrial Instrumentation, PLC • Process Control • Power Control Loops
Typical Application Circuit
• Sensor Conditioning • Electronic Weight Scales 40VDD • Medical Instrumentation • Automotive Monitors Load • Low-side Current Sensing U 40V 1 DD
Design Aids MCP6V51
IL + • Microchip Advanced Part Selector (MAPS) VOUT R - • Application Notes SHUNT 0.05Ω RG R
Related Parts
100Ω F
• MCP6V71/1U/2/4: Zero-Drift, 2 MHz, 1.8V to 5V
20 kΩ
• MCP6V81/1U/2/4: Zero-Drift, 5 MHz, 1.8V to 5V
C F 8.2 nF 2018 Microchip Technology Inc. DS20006136A-page 1 Document Outline 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering Features Typical Applications Design Aids Related Parts General Description Package Types Typical Application Circuit FIGURE 1: Input Offset Voltage vs. Ambient Temperature with VDD = 4.5V. FIGURE 2: Input Offset Voltage vs. Ambient Temperature with VDD = 45V. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Electrical Specifications DC Electrical Specifications AC Electrical Specifications Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Noninverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-4: Input Offset Voltage vs. Output Voltage with VDD = 4.5V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage with VDD = 45V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Voltage with VDD = 4.5V FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 45V. FIGURE 2-8: CMRR. FIGURE 2-9: PSRR. FIGURE 2-10: DC Open-Loop Gain. FIGURE 2-11: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-12: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-15: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 45V. FIGURE 2-16: Input Bias Current vs. Input Voltage (Below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-17: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-18: Output Voltage Headroom vs. Output Current. FIGURE 2-19: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-20: Output Voltage Headroom vs Temperature RL = 10 kΩ. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. 2.3 Frequency Response FIGURE 2-23: CMRR and PSRR vs. Frequency. FIGURE 2-24: Open-Loop Gain vs. Frequency with VDD = 4.5V. FIGURE 2-25: Open-Loop Gain vs. Frequency with VDD = 45V. FIGURE 2-26: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-27: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-28: Closed-Loop Output Impedance vs. Frequency with VDD = 4.5V. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency with VDD = 45V. FIGURE 2-30: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-31: EMIRR vs. Frequency. 2.4 Input Noise FIGURE 2-32: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-33: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 4.5V. FIGURE 2-34: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 45V. 2.5 Time Response FIGURE 2-35: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-36: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-37: The MCP6V51 Shows No Input Phase Reversal with Overdrive. FIGURE 2-38: Noninverting Small Signal Step Response. FIGURE 2-39: Noninverting Large Signal Step Response. FIGURE 2-40: Noninverting 40 VPP Step Response. FIGURE 2-41: Inverting Small Signal Step Response. FIGURE 2-42: Inverting Large Signal Step Response. FIGURE 2-43: Inverting 40 VPP Step Response. FIGURE 2-44: Slew Rate vs. Ambient Temperature. FIGURE 2-45: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-46: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. EQUATION 4-1: EQUATION 4-2: 4.3 Application Tips EQUATION 4-3: FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Output Resistor, RISO, Stabilizes Capacitive Loads FIGURE 4-9: Amplifier with Parasitic Capacitance. EQUATION 4-4: 4.4 Typical Applications FIGURE 4-10: Low-Side Current Sense for 1.5A Max Load Current. FIGURE 4-11: Simple Design. FIGURE 4-12: Higher Performance Design. FIGURE 4-13: RTD Sensor. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision A (December 2018) Product Identification System Trademarks Worldwide Sales and Service
• High DC Precision: The Microchip Technology Inc. MCP6V51 operational - V amplifier employs dynamic offset correction for very OS Drift: 36 nV/°C (max.) - V low offset and offset drift. The device has a gain OS: 15 µV (max.) bandwidth product of 2 MHz (typical). It is unity-gain - Open-Loop Gain: 140 dB (min.) stable, has virtually no 1/f noise and excel ent Power - PSRR: 134 dB (min.) Supply Rejection Ratio (PSRR) and Common Mode - CMRR: 135 dB (min.) Rejection Ratio (CMRR). The product operates with a • Low Noise: single supply voltage that can range from 4.5V to 45V, - 10.2 nV/√ Hz at 1 kHz (±2.25V to ±22.5V), while drawing 470 µA (typical) of quiescent current. - Eni: 0.21 µVP-P, f = 0.1 Hz to 10 Hz • Low Power: The MCP6V51 op amp is offered as a single-channel amplifier and is designed using an advanced CMOS - IQ: 470 µA/amplifier (typ.) process. - Wide Supply Voltage Range: 4.5V to 45V • Easy to Use:
Package Types
- Input Range incl. Negative Rail - Rail-to-Rail Output - EMI Filtered Inputs
MCP6V51 MCP6V51
- Gain Bandwidth Product: 2 MHz SOT-23-5 MSOP-8 - Slew Rate 1.2V/µs NC - Unity Gain Stable VOUT 1 5 VDD NC 1 8 V • Smal Packages: 5-Lead SOT23, 8-Lead MSOP V 2 7 SS 2 VIN– DD V V • Extended Temperature Range: -40°C to +125°C V 3 6 IN+ 3 4 VIN– IN+ OUT VSS 4 5 NC
Typical Applications
• Industrial Instrumentation, PLC • Process Control • Power Control Loops
Typical Application Circuit
• Sensor Conditioning • Electronic Weight Scales 40VDD • Medical Instrumentation • Automotive Monitors Load • Low-side Current Sensing U 40V 1 DD
Design Aids MCP6V51
IL + • Microchip Advanced Part Selector (MAPS) VOUT R - • Application Notes SHUNT 0.05Ω RG R
Related Parts
100Ω F
• MCP6V71/1U/2/4: Zero-Drift, 2 MHz, 1.8V to 5V
20 kΩ
• MCP6V81/1U/2/4: Zero-Drift, 5 MHz, 1.8V to 5V
C F 8.2 nF 2018 Microchip Technology Inc. DS20006136A-page 1 Document Outline 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering Features Typical Applications Design Aids Related Parts General Description Package Types Typical Application Circuit FIGURE 1: Input Offset Voltage vs. Ambient Temperature with VDD = 4.5V. FIGURE 2: Input Offset Voltage vs. Ambient Temperature with VDD = 45V. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Electrical Specifications DC Electrical Specifications AC Electrical Specifications Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Noninverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-4: Input Offset Voltage vs. Output Voltage with VDD = 4.5V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage with VDD = 45V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Voltage with VDD = 4.5V FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 45V. FIGURE 2-8: CMRR. FIGURE 2-9: PSRR. FIGURE 2-10: DC Open-Loop Gain. FIGURE 2-11: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-12: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-15: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 45V. FIGURE 2-16: Input Bias Current vs. Input Voltage (Below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-17: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-18: Output Voltage Headroom vs. Output Current. FIGURE 2-19: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-20: Output Voltage Headroom vs Temperature RL = 10 kΩ. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. 2.3 Frequency Response FIGURE 2-23: CMRR and PSRR vs. Frequency. FIGURE 2-24: Open-Loop Gain vs. Frequency with VDD = 4.5V. FIGURE 2-25: Open-Loop Gain vs. Frequency with VDD = 45V. FIGURE 2-26: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-27: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-28: Closed-Loop Output Impedance vs. Frequency with VDD = 4.5V. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency with VDD = 45V. FIGURE 2-30: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-31: EMIRR vs. Frequency. 2.4 Input Noise FIGURE 2-32: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-33: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 4.5V. FIGURE 2-34: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 45V. 2.5 Time Response FIGURE 2-35: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-36: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-37: The MCP6V51 Shows No Input Phase Reversal with Overdrive. FIGURE 2-38: Noninverting Small Signal Step Response. FIGURE 2-39: Noninverting Large Signal Step Response. FIGURE 2-40: Noninverting 40 VPP Step Response. FIGURE 2-41: Inverting Small Signal Step Response. FIGURE 2-42: Inverting Large Signal Step Response. FIGURE 2-43: Inverting 40 VPP Step Response. FIGURE 2-44: Slew Rate vs. Ambient Temperature. FIGURE 2-45: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-46: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. EQUATION 4-1: EQUATION 4-2: 4.3 Application Tips EQUATION 4-3: FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Output Resistor, RISO, Stabilizes Capacitive Loads FIGURE 4-9: Amplifier with Parasitic Capacitance. EQUATION 4-4: 4.4 Typical Applications FIGURE 4-10: Low-Side Current Sense for 1.5A Max Load Current. FIGURE 4-11: Simple Design. FIGURE 4-12: Higher Performance Design. FIGURE 4-13: RTD Sensor. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision A (December 2018) Product Identification System Trademarks Worldwide Sales and Service
