Datasheet MCP6V51 (Microchip) - 3
| Manufacturer | Microchip |
| Description | The MCP6V51 operational amplifier provides input offset voltage correction for very low offset and offset drift |
| Pages / Page | 43 / 3 — MCP6V51. 1.0. ELECTRICAL CHARACTERISTICS. 1.1. Absolute Maximum Ratings … |
| File Format / Size | PDF / 3.6 Mb |
| Document Language | English |
MCP6V51. 1.0. ELECTRICAL CHARACTERISTICS. 1.1. Absolute Maximum Ratings †. (Note 1). † Notice:. Note 1:
Text Version of Document
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MCP6V51 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings †
VDD - VSS ..49.5V Current at Input Pins ..±10 mA Analog Inputs (VIN+ and VIN-)
(Note 1)
... VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs .. VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...±1V Output Short Circuit Current ... Continuous Current at Output and Supply Pins ..±50 mA Storage Temperature ...-65°C to +150°C Maximum Junction Temperature .. +150°C ESD protection on all pins (HBM, CDM, MM) 2 kV, 750V, 200V
† Notice:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Note 1:
See
Section 4.2.1, Input Protection. 1.2 Electrical Specifications DC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +4.5V to +45V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 100 pF (refer to
Figure 1-4
and
Figure 1-5
).
Parameters Sym. Min. Typ. Max. Units Conditions Input Offset
Input Offset Voltage VOS -15 ±2.4 +15 µV TA = +25°C Input Offset Voltage Drift with TC1 -31 ±5 +31 nV/°C TA = -40 to +125°C, Temperature (Linear Temp. Co.) VDD = 4.5V
(Note 1)
TC1 -36 ±7 +36 nV/°C TA = -40 to +125°C, VDD = 45V
(Note 1)
Input Offset Voltage Quadratic TC2 — ±42 — nV/ TA = -40 to +125°C Temp. Co. °C2 VDD = 4.5V TC2 — ±38 — nV/ TA = -40 to +125°C °C2 VDD = 45V Input Offset Voltage Aging ∆VOS — ±2 — µV 408 hours Life Test at +150°C, measured at +25°C Power Supply Rejection Ratio PSRR 134 160 — dB 124 138 — dB TA = -40°C to +125°C VDD = 45V
(Note 1 ) Input Bias Current and Impedance
Input Bias Current IB -250 ±60 +250 pA VDD = 45V
Note 1:
Not production tested. Limits set by characterization and/or simulation and provided as design guidance only.
2: Figure 2-17
shows how VCML and VCMH changed across temperature for the first production lot. 2018 Microchip Technology Inc. DS20006136A-page 3 Document Outline 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering Features Typical Applications Design Aids Related Parts General Description Package Types Typical Application Circuit FIGURE 1: Input Offset Voltage vs. Ambient Temperature with VDD = 4.5V. FIGURE 2: Input Offset Voltage vs. Ambient Temperature with VDD = 45V. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Electrical Specifications DC Electrical Specifications AC Electrical Specifications Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Noninverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-4: Input Offset Voltage vs. Output Voltage with VDD = 4.5V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage with VDD = 45V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Voltage with VDD = 4.5V FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 45V. FIGURE 2-8: CMRR. FIGURE 2-9: PSRR. FIGURE 2-10: DC Open-Loop Gain. FIGURE 2-11: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-12: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-15: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 45V. FIGURE 2-16: Input Bias Current vs. Input Voltage (Below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-17: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-18: Output Voltage Headroom vs. Output Current. FIGURE 2-19: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-20: Output Voltage Headroom vs Temperature RL = 10 kΩ. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. 2.3 Frequency Response FIGURE 2-23: CMRR and PSRR vs. Frequency. FIGURE 2-24: Open-Loop Gain vs. Frequency with VDD = 4.5V. FIGURE 2-25: Open-Loop Gain vs. Frequency with VDD = 45V. FIGURE 2-26: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-27: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-28: Closed-Loop Output Impedance vs. Frequency with VDD = 4.5V. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency with VDD = 45V. FIGURE 2-30: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-31: EMIRR vs. Frequency. 2.4 Input Noise FIGURE 2-32: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-33: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 4.5V. FIGURE 2-34: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 45V. 2.5 Time Response FIGURE 2-35: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-36: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-37: The MCP6V51 Shows No Input Phase Reversal with Overdrive. FIGURE 2-38: Noninverting Small Signal Step Response. FIGURE 2-39: Noninverting Large Signal Step Response. FIGURE 2-40: Noninverting 40 VPP Step Response. FIGURE 2-41: Inverting Small Signal Step Response. FIGURE 2-42: Inverting Large Signal Step Response. FIGURE 2-43: Inverting 40 VPP Step Response. FIGURE 2-44: Slew Rate vs. Ambient Temperature. FIGURE 2-45: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-46: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. EQUATION 4-1: EQUATION 4-2: 4.3 Application Tips EQUATION 4-3: FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Output Resistor, RISO, Stabilizes Capacitive Loads FIGURE 4-9: Amplifier with Parasitic Capacitance. EQUATION 4-4: 4.4 Typical Applications FIGURE 4-10: Low-Side Current Sense for 1.5A Max Load Current. FIGURE 4-11: Simple Design. FIGURE 4-12: Higher Performance Design. FIGURE 4-13: RTD Sensor. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision A (December 2018) Product Identification System Trademarks Worldwide Sales and Service
MCP6V51 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings †
VDD - VSS ..49.5V Current at Input Pins ..±10 mA Analog Inputs (VIN+ and VIN-)
(Note 1)
... VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs .. VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...±1V Output Short Circuit Current ... Continuous Current at Output and Supply Pins ..±50 mA Storage Temperature ...-65°C to +150°C Maximum Junction Temperature .. +150°C ESD protection on all pins (HBM, CDM, MM) 2 kV, 750V, 200V
† Notice:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Note 1:
See
Section 4.2.1, Input Protection. 1.2 Electrical Specifications DC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +4.5V to +45V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 100 pF (refer to
Figure 1-4
and
Figure 1-5
).
Parameters Sym. Min. Typ. Max. Units Conditions Input Offset
Input Offset Voltage VOS -15 ±2.4 +15 µV TA = +25°C Input Offset Voltage Drift with TC1 -31 ±5 +31 nV/°C TA = -40 to +125°C, Temperature (Linear Temp. Co.) VDD = 4.5V
(Note 1)
TC1 -36 ±7 +36 nV/°C TA = -40 to +125°C, VDD = 45V
(Note 1)
Input Offset Voltage Quadratic TC2 — ±42 — nV/ TA = -40 to +125°C Temp. Co. °C2 VDD = 4.5V TC2 — ±38 — nV/ TA = -40 to +125°C °C2 VDD = 45V Input Offset Voltage Aging ∆VOS — ±2 — µV 408 hours Life Test at +150°C, measured at +25°C Power Supply Rejection Ratio PSRR 134 160 — dB 124 138 — dB TA = -40°C to +125°C VDD = 45V
(Note 1 ) Input Bias Current and Impedance
Input Bias Current IB -250 ±60 +250 pA VDD = 45V
Note 1:
Not production tested. Limits set by characterization and/or simulation and provided as design guidance only.
2: Figure 2-17
shows how VCML and VCMH changed across temperature for the first production lot. 2018 Microchip Technology Inc. DS20006136A-page 3 Document Outline 45V, 2 MHz Zero-Drift Op Amp with EMI Filtering Features Typical Applications Design Aids Related Parts General Description Package Types Typical Application Circuit FIGURE 1: Input Offset Voltage vs. Ambient Temperature with VDD = 4.5V. FIGURE 2: Input Offset Voltage vs. Ambient Temperature with VDD = 45V. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Electrical Specifications DC Electrical Specifications AC Electrical Specifications Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up. FIGURE 1-2: Offset Correction Settling Time. FIGURE 1-3: Output Overdrive Recovery. 1.4 Test Circuits FIGURE 1-4: AC and DC Test Circuit for Most Noninverting Gain Conditions. FIGURE 1-5: AC and DC Test Circuit for Most Inverting Gain Conditions. FIGURE 1-6: Test Circuit for Dynamic Input Behavior. 2.0 Typical Performance Curves 2.1 DC Input Precision FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-4: Input Offset Voltage vs. Output Voltage with VDD = 4.5V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage with VDD = 45V. FIGURE 2-6: Input Offset Voltage vs. Common Mode Voltage with VDD = 4.5V FIGURE 2-7: Input Offset Voltage vs. Common Mode Voltage with VDD = 45V. FIGURE 2-8: CMRR. FIGURE 2-9: PSRR. FIGURE 2-10: DC Open-Loop Gain. FIGURE 2-11: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-12: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-15: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 45V. FIGURE 2-16: Input Bias Current vs. Input Voltage (Below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-17: Input Common Mode Voltage Headroom (Range) vs. Ambient Temperature. FIGURE 2-18: Output Voltage Headroom vs. Output Current. FIGURE 2-19: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-20: Output Voltage Headroom vs Temperature RL = 10 kΩ. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Supply Current vs. Power Supply Voltage. 2.3 Frequency Response FIGURE 2-23: CMRR and PSRR vs. Frequency. FIGURE 2-24: Open-Loop Gain vs. Frequency with VDD = 4.5V. FIGURE 2-25: Open-Loop Gain vs. Frequency with VDD = 45V. FIGURE 2-26: Gain Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-27: Gain Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-28: Closed-Loop Output Impedance vs. Frequency with VDD = 4.5V. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency with VDD = 45V. FIGURE 2-30: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-31: EMIRR vs. Frequency. 2.4 Input Noise FIGURE 2-32: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-33: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 4.5V. FIGURE 2-34: Input Noise vs. Time with 1 Hz and 10 Hz Filters and VDD = 45V. 2.5 Time Response FIGURE 2-35: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-36: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-37: The MCP6V51 Shows No Input Phase Reversal with Overdrive. FIGURE 2-38: Noninverting Small Signal Step Response. FIGURE 2-39: Noninverting Large Signal Step Response. FIGURE 2-40: Noninverting 40 VPP Step Response. FIGURE 2-41: Inverting Small Signal Step Response. FIGURE 2-42: Inverting Large Signal Step Response. FIGURE 2-43: Inverting 40 VPP Step Response. FIGURE 2-44: Slew Rate vs. Ambient Temperature. FIGURE 2-45: Output Overdrive Recovery vs. Time with G = -10 V/V. FIGURE 2-46: Output Overdrive Recovery Time vs. Inverting Gain. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Applications 4.1 Overview of Zero-Drift Operation FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. 4.2 Other Functional Blocks FIGURE 4-4: Simplified Analog Input ESD Structures. FIGURE 4-5: Protecting the Analog Inputs against High Voltages. FIGURE 4-6: Protecting the Analog Inputs Against High Currents. EQUATION 4-1: EQUATION 4-2: 4.3 Application Tips EQUATION 4-3: FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Output Resistor, RISO, Stabilizes Capacitive Loads FIGURE 4-9: Amplifier with Parasitic Capacitance. EQUATION 4-4: 4.4 Typical Applications FIGURE 4-10: Low-Side Current Sense for 1.5A Max Load Current. FIGURE 4-11: Simple Design. FIGURE 4-12: Higher Performance Design. FIGURE 4-13: RTD Sensor. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Revision A (December 2018) Product Identification System Trademarks Worldwide Sales and Service
