PIC16(L)F170X/171X (Microchip) - 9
| Manufacturer | Microchip |
| Description | Cost Effective 8-Bit Intelligent Analog Flash Microcontrollers |
| Pages / Page | 18 / 9 — TABLE 2:. 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1704/5). O S. ros. … |
| File Format / Size | PDF / 449 Kb |
| Document Language | English |
TABLE 2:. 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1704/5). O S. ros. SSP. rru. ll-u. sic. I/O. OIC/S. ADC. feren. DAC. PWM. COG. EUSART. (1). A d
Model Line for this Datasheet
- PIC16F1703-E/ML PIC16F1703-E/P PIC16F1703-E/PVAO PIC16F1703-E/SL PIC16F1703-E/ST PIC16F1703-E/STVAO PIC16F1703-I/ML PIC16F1703-I/P PIC16F1703-I/SL PIC16F1703-I/ST PIC16F1703T-E/STVAO PIC16F1703T-I/ML PIC16F1703T-I/SL PIC16F1703T-I/ST
- PIC16F1704-E/ML PIC16F1704-E/MLVAO PIC16F1704-E/P PIC16F1704-E/SL PIC16F1704-E/SLVAO PIC16F1704-E/ST PIC16F1704-E/STVAO PIC16F1704-I/JQ PIC16F1704-I/ML PIC16F1704-I/MLVAO PIC16F1704-I/P PIC16F1704-I/SL PIC16F1704-I/SLVAO PIC16F1704-I/ST PIC16F1704T-E/ML PIC16F1704T-E/MLVAO PIC16F1704T-E/SL PIC16F1704T-E/SLVAO PIC16F1704T-E/STVAO PIC16F1704T-I/ML PIC16F1704T-I/MLVAO PIC16F1704T-I/SL PIC16F1704T-I/SLVAO PIC16F1704T-I/ST PIC16F1704T-I/STVAO
- PIC16F1705-E/ML PIC16F1705-E/P PIC16F1705-E/SL PIC16F1705-E/ST PIC16F1705-E/STVAO PIC16F1705-I/ML PIC16F1705-I/MLVAO PIC16F1705-I/P PIC16F1705-I/SL PIC16F1705-I/ST PIC16F1705-I/STVAO PIC16F1705T-E/SL PIC16F1705T-E/ST PIC16F1705T-E/STVAO PIC16F1705T-I/ML PIC16F1705T-I/MLVAO PIC16F1705T-I/SL PIC16F1705T-I/ST PIC16F1705T-I/STVAO
- PIC16F1707-E/ML PIC16F1707-E/P PIC16F1707-E/SO PIC16F1707-E/SS PIC16F1707-I/ML PIC16F1707-I/P PIC16F1707-I/SO PIC16F1707-I/SS PIC16F1707T-I/SO
- PIC16F1708-E/ML PIC16F1708-E/P PIC16F1708-E/SO PIC16F1708-E/SS PIC16F1708-E/SSVAO PIC16F1708-I/GZ PIC16F1708-I/ML PIC16F1708-I/P PIC16F1708-I/SO PIC16F1708-I/SS PIC16F1708T-E/ML PIC16F1708T-E/SS PIC16F1708T-E/SSVAO PIC16F1708T-I/ML PIC16F1708T-I/SO PIC16F1708T-I/SS
- PIC16F1709-E/ML PIC16F1709-E/P PIC16F1709-E/SO PIC16F1709-E/SS PIC16F1709-I/ML PIC16F1709-I/P PIC16F1709-I/SO PIC16F1709-I/SS PIC16F1709T-E/SS PIC16F1709T-I/ML PIC16F1709T-I/SO PIC16F1709T-I/SS
- PIC16F1713-E/ML PIC16F1713-E/MV PIC16F1713-E/SO PIC16F1713-E/SP PIC16F1713-E/SS PIC16F1713-I/ML PIC16F1713-I/MV PIC16F1713-I/SO PIC16F1713-I/SP PIC16F1713-I/SS PIC16F1713-I/SSVAO PIC16F1713T-E/MV PIC16F1713T-E/MVVAO PIC16F1713T-I/ML PIC16F1713T-I/MV PIC16F1713T-I/SO PIC16F1713T-I/SS PIC16F1713T-I/SSVAO
- PIC16F1716-E/ML PIC16F1716-E/MV PIC16F1716-E/SO PIC16F1716-E/SP PIC16F1716-E/SS PIC16F1716-I/ML PIC16F1716-I/MV PIC16F1716-I/SO PIC16F1716-I/SP PIC16F1716-I/SS PIC16F1716T-E/MVVAO PIC16F1716T-I/ML PIC16F1716T-I/MV PIC16F1716T-I/SO PIC16F1716T-I/SS
- PIC16F1717-E/ML PIC16F1717-E/MV PIC16F1717-E/P PIC16F1717-E/PT PIC16F1717-I/ML PIC16F1717-I/MV PIC16F1717-I/P PIC16F1717-I/PT PIC16F1717T-E/MVVAO PIC16F1717T-I/ML PIC16F1717T-I/MV PIC16F1717T-I/PT
Text Version of Document
2013
TABLE 2: 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1704/5) P
Micr
O S s ce or p t ) at p ros rs p
ochip T
(2 N ar e P C Am C SSP rru ll-u sic I/O OIC/S QF ADC feren p DAC m CC CL u /S m ro PWM COG M te Ba o Op Ti EUSART In P IP Re C Ze
e
D
ch
P
nol RA0 13 12 AN0 VREF- C1IN+ — DAC1OUT — — — — — — — IOC Y ICSPDAT ogy RA1 12 11 AN1 VREF+ C1IN0- — — — — — — — — — IOC Y ICSPCLK I C2IN0- n c. RA2 11 10 AN2 — — — DAC1OUT2 ZCD T0CKI
(1)
— COGIN
(1)
— — — INT
(1)
Y — IOC RA3 4 3 — — — — — — — — — — — — IOC Y MCLR VPP RA4 3 2 AN3 — — — — — T1G
(1)
— — — — — IOC Y CLKOUT SOSCO OSC2
A d
RA5 2 1 — — — — — — T1CKI
(1)
— — — — CLCIN3
(1)
IOC Y CLKIN
va
SOSCI OSC1
nce Inf
RC0 10 9 AN4 — C2IN+ OPA1IN+ — — — — — SCK
(1)
— — IOC Y — SCL
(3)
RC1 9 8 AN5 — C1IN1- OPA1IN- — — — — — SDI
(1)
— CLCIN2
(1)
IOC Y — C2IN1- SDA
(3) o
RC2 8 7 AN6 — C1IN2- OPA1OUT — — — — — — — — IOC Y —
r
C2IN2-
m
RC3 7 6 AN7 — C1IN3- OPA2OUT — — — CCP2
(1)
— SS
(1)
— CLCIN0
(1)
IOC Y —
PIC16 at
C2IN3-
ion
RC4 6 5 — — — OPA2IN- — — — — — — CK
(1)
CLCIN1
(1)
IOC Y — RC5 5 4 — — — OPA2IN+ — — — CCP1
(1)
— — RX
(3)
— IOC Y — VDD 1 16 — — — — — — — — — — — — — — VDD VSS 14 13 — — — — — — — — — — — — — — VSS
(
— — — — C1OUT — — — — CPP1 PWM3OUT COGA SDA
(3)
CK CLC1OUT — — —
L)F170X/171X
— — — — C2OUT — — — — CPP2 PWM4OUT COGB SCL
(3)
DT
(3)
CLC2OUT — — — OUT
(2)
— — — — — — — — — — — COGC SDO TX CLC3OUT — — — — — — — — — — — — — — COGD SCK — — — — —
Note 1:
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. DS
2:
All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers. 40001708A
3:
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. -page 9 Document Outline Description: Core Features: Memory: Operating Characteristics: eXtreme Low-Power (XLP) Features: - 8 uA @ 32 kHz, 1.8V, typical - 32 uA/MHz @ 1.8V, typical Digital Peripherals: Intelligent Analog Peripherals: Clocking Structure: Programming/Debug Features: TABLE 1: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1703) TABLE 2: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1704/5) TABLE 3: 20-Pin Allocation Table (PIC16(L)F1707) TABLE 4: 20-Pin Allocation Table (PIC16(L)F1708/9) TABLE 5: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 1) TABLE 6: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 2) TABLE 7: Pin Allocation Table (PIC16L(F)1717/9) (Part 1) TABLE 8: Pin Allocation Table (PIC16L(F)1717/9) (Part 2 Trademarks Worldwide Sales
TABLE 2: 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1704/5) P
Micr
O S s ce or p t ) at p ros rs p
ochip T
(2 N ar e P C Am C SSP rru ll-u sic I/O OIC/S QF ADC feren p DAC m CC CL u /S m ro PWM COG M te Ba o Op Ti EUSART In P IP Re C Ze
e
D
ch
P
nol RA0 13 12 AN0 VREF- C1IN+ — DAC1OUT — — — — — — — IOC Y ICSPDAT ogy RA1 12 11 AN1 VREF+ C1IN0- — — — — — — — — — IOC Y ICSPCLK I C2IN0- n c. RA2 11 10 AN2 — — — DAC1OUT2 ZCD T0CKI
(1)
— COGIN
(1)
— — — INT
(1)
Y — IOC RA3 4 3 — — — — — — — — — — — — IOC Y MCLR VPP RA4 3 2 AN3 — — — — — T1G
(1)
— — — — — IOC Y CLKOUT SOSCO OSC2
A d
RA5 2 1 — — — — — — T1CKI
(1)
— — — — CLCIN3
(1)
IOC Y CLKIN
va
SOSCI OSC1
nce Inf
RC0 10 9 AN4 — C2IN+ OPA1IN+ — — — — — SCK
(1)
— — IOC Y — SCL
(3)
RC1 9 8 AN5 — C1IN1- OPA1IN- — — — — — SDI
(1)
— CLCIN2
(1)
IOC Y — C2IN1- SDA
(3) o
RC2 8 7 AN6 — C1IN2- OPA1OUT — — — — — — — — IOC Y —
r
C2IN2-
m
RC3 7 6 AN7 — C1IN3- OPA2OUT — — — CCP2
(1)
— SS
(1)
— CLCIN0
(1)
IOC Y —
PIC16 at
C2IN3-
ion
RC4 6 5 — — — OPA2IN- — — — — — — CK
(1)
CLCIN1
(1)
IOC Y — RC5 5 4 — — — OPA2IN+ — — — CCP1
(1)
— — RX
(3)
— IOC Y — VDD 1 16 — — — — — — — — — — — — — — VDD VSS 14 13 — — — — — — — — — — — — — — VSS
(
— — — — C1OUT — — — — CPP1 PWM3OUT COGA SDA
(3)
CK CLC1OUT — — —
L)F170X/171X
— — — — C2OUT — — — — CPP2 PWM4OUT COGB SCL
(3)
DT
(3)
CLC2OUT — — — OUT
(2)
— — — — — — — — — — — COGC SDO TX CLC3OUT — — — — — — — — — — — — — — COGD SCK — — — — —
Note 1:
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers. DS
2:
All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers. 40001708A
3:
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. -page 9 Document Outline Description: Core Features: Memory: Operating Characteristics: eXtreme Low-Power (XLP) Features: - 8 uA @ 32 kHz, 1.8V, typical - 32 uA/MHz @ 1.8V, typical Digital Peripherals: Intelligent Analog Peripherals: Clocking Structure: Programming/Debug Features: TABLE 1: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1703) TABLE 2: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1704/5) TABLE 3: 20-Pin Allocation Table (PIC16(L)F1707) TABLE 4: 20-Pin Allocation Table (PIC16(L)F1708/9) TABLE 5: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 1) TABLE 6: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 2) TABLE 7: Pin Allocation Table (PIC16L(F)1717/9) (Part 1) TABLE 8: Pin Allocation Table (PIC16L(F)1717/9) (Part 2 Trademarks Worldwide Sales
