The op amp biases the JFET at IDSS, with VGS = 0 V
| Authors | Glen Brisebois |
| Main Document | Article «Op amps make JFET circuits repeatable» |
| Description | Figure 1 |
| File Format / Size | PDF / 15 Kb |
| Document Language | English |
Other Materials from the Main Document
- Article «Op amps make JFET circuits repeatable»
- Figure 1. The op amp biases the JFET at IDSS, with VGS = 0 V
- Figure 2. This fast, high-gain photodiode amplifier uses Figure 1's scheme to bias the JFET
