Erjon Qirko and Kris Lokere, Linear Technology
Design Note 1039
The LT6018 is an ultralow noise (1.2 nV/√Hz at 1 kHz) operational amplifier with ultralow distortion (–115 dB at 1 kHz). It has a gain bandwidth product of 15 MHz, maximum offset voltage of 50 μV and a maximum offset voltage drift of 0.5 μV/°C. This combination of features makes it suitable for driving a variety of high resolution analogtodigital converters (ADCs). This Design Note presents circuits and optimization strategies to achieve the best signaltonoise ratio (SNR) and total harmonic distortion (THD) when using the LT6018 to drive high speed 18bit and 20 bit successive approximation register (SAR) ADCs.
Figure 1 shows a modification of the DC2135A demonstration circuit, with the LT6018 (replacing the LT1468) driving the LTC237820 20bit SAR ADC. The LTC237820 stands out for its unrivaled 2 ppm linearity performance. The best way to create a differential signal while maintaining linearity is by using the precision matched resistors in the LT5400 used on this demo board. A detailed theory of operation for the circuit shown in Figure 1 appears in Design Note 1032 (where the LT1468 drives the LTC237720).
Figure 1.  DC2135A Demo Board Setup. 
To measure the circuit’s linearity, an ultrapure sine wave is fed into the input, and the FFT is calculated at the output. The resulting THD measurement serves as proxy for the circuit’s INL (integral nonlinearity) performance. At an ADC sample rate of 800 kHz, we use an input frequency of about 100 Hz (slightly adjusted to ensure coherent sampling, alleviating FFT numerical limitations).
The original demonstration circuit includes an RC lowpass filter directly after the op amp to filter out excess high frequency noise. The LT6018’s noise density remains relatively low even at high frequencies, so removing this filter negligibly affects total noise. Without the filter, linearity (as measured by THD) improves markedly, since the singleendedtodifferential conversion is now entirely governed by the precisely matched resistors in the LT5400, uncorrupted by any poorly matched discrete components.
The LT6018’s low noise density makes it suitable for circuits that require gain. Configured in a gain of 10, the signal strength increases by 20 dB while the SNR degrades by 2 dB relative to full scale. If the input signals are small, this arrangement improves effective signaltonoise ratio by 18 dB. As expected, linearity is reduced by the same amount as the amplifier loop gain, or about 20 dB.
The results are summarized in Table 1.
Figure 1.  LT6018 Driving LTC237820 SNR and THD Results 


The LTC238718 is an 18Bit SAR ADC that can sample up to 15 Msps. At this sample rate, the ADC’s internal sampling capacitor is connected to the amplifier output for less than 30 ns (the “acquisition time”). During that time, the amplifier (and filter) circuit must recover from charge kickback and replenish the charge of the sample capacitor, so the ADC can measure the correct input voltage at the next conversion cycle. Careful optimization of the amplifier and filter network is in order.
In Figure 2, two LT6018s are configured as unitygain followers, and connected to the LTC238718 demo board, which has provisions for filter resistors and capacitors at the ADC input.
Figure 2.  The LT6018 Driving the LTC238718 Using the DC2290AA Demo Board. 
Table 2 shows the SNR and THD results, measured for a 1.008 kHz pure sine wave at the input, and the ADC sampling at a coherent 14.680 Msps. The first table entry shows results with the LT6200 amplifier, a very high speed, low noise op amp. The filter configuration is the demo board default bandwidth of about 200 MHz. This allows full settling of the ADC charge kickback, which results in excellent THD of –120 dB. However, SNR is 2 dB below the 96 dB capability of the ADC.
Figure 2.  LT6018 Driving LTC238718 SNR and THD Results  

The LT6018 has lower bandwidth than the LT6200, but much better DC accuracy (offset and drift). However, plugging the LT6018 into the same configuration as the LT6200 significantly degrades SNR and THD. SNR is degraded because amplifier noise density can be higher above its bandwidth than below, and this noise, if not filtered, will alias into the ADC. THD is degraded because the slower amplifier – when hit with the full ADC charge kickback – does not properly settle and leaves nonlinear residues for the ADC to digitize.
We can filter the wideband amplifier noise by increasing the value of the resistors and capacitors, and by including a differential capacitor between the two ADC inputs. Doing so improves the SNR all the way to the theoretical maximum of 96 dB for this ADC, which means that integrated amplifier noise has become negligible. Furthermore, by skewing the filter configuration toward smaller series resistors and larger capacitors, the initial effect of the charge kickback is attenuated, resulting in improved THD performance, well below –100 dB.
Modern SAR ADCs combine low noise with high linearity and precise DC offset accuracy. Realizing these specs requires an amplifier with similarly good DC specs, low noise and sufficient bandwidth, such as the LT6018. With moderate speed ADCs (such as the 1 Msps 20bit LTC237820), the LT6018, in combination with precisely matched LT5400 resistors, can create a differential input signal with no additional filtering required. With ultrafast SAR ADCs (such as the 18bit 15 Msps LTC238718), careful optimization of an RC filter network between the op amp and ADC results in excellent noise and linearity performance.
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