This Design Idea is an evolution and simplification of another (Figure 1, Reference 1). Replacing the three inverted-input NOR gates with their logical equivalents, positive-input NAND gates, makes these three gate symbols consistent with the fourth, which was drawn as a positive-input NAND gate. The 74HC132's data sheet describes the device as a quad, two-input NAND gate with hysteresis.
|Figure 1.||This is the original circuit, as published in Reference 1.|
As the earlier design also describes, you can activate the DPDT rocker switch, S1, to produce either a “count-up” or a “countdown” effect at the digital potentiometer, CAT5114. Moving the switch up causes S1A to ground the input of IC1A, thus causing the NAND-gate flip-flop, IC1A and IC1B, to switch high, thereby commanding the CAT5114 to count up. At the same time, S1B causes the 1-µF capacitor on IC1C’s upper input to discharge through a 10-kΩ resistor. Eventually the output of IC1C also switches high, thus enabling the oscillator comprising IC1D. Similarly, moving the switch down causes S1B to ground the input of IC1B, thus causing the NAND-gate flip-flop to switch low, thereby commanding the CAT5114 to count down. At the same time, S1A causes the 1-µF capacitor on IC1C’s lower input to discharge through a 10-kΩ resistor, thereby eventually enabling the oscillator comprising IC1D.
|Figure 2.||You can restructure the switch-interface circuit
of Figure 1 as shown.
The first step in simplifying this design is to rearrange the connections of S1 so that the A and B sections are not cross-connected between operating the flip-flop and the oscillator-enabling circuit. You can rewire the interface structure as shown in Figure 2. This circuit uses S1A to control the flip-flop, whereas S1B controls the oscillator-enable circuit. This step does nothing directly to reduce the parts count of the circuit; however, it does make the subsequent step more obvious. The next step in the simplification is to recognize that the two RC networks on the inputs of IC1C both do the same thing but in opposite switch positions. As far as IC1C is concerned, either switch position performs the same function; that is, to debounce the switch contacts and eventually enable the oscillator. Thus, you need only one RC network, and you can tie it to both of S1B’s active positions (Figure 3). Moving the switch in either direction discharges the 1-µF capacitor through the 10-kΩ resistor, eventually causing the output of IC1C to switch high, thus enabling the oscillator. When you release the switch, S1B goes to the open, or off, state, and the 1-µF capacitor recharges through the 100-kΩ resistor, thus turning off the oscillator.
|Figure 3.||You can simplify the oscillator-enable structure, as shown.|
The last simplification step stems from realizing that the sole purpose of IC1C and the RC filter on its input is to generate a high state whenever switch S1 is in either of its active positions. True, the RC filter does debounce the switch contacts; however, the actual switch-closure information available at S1B is also available at S1A. Thus, you can simply use IC1C to directly monitor the S1A contacts. You can move the RC filtering to the input of IC1D. This step allows you to simplify S1, changing it from a DPDT to a SPDT configuration, which means you can use a cheaper switch. Because the RC debounce filter now connects to a low-impedance gate output, IC1C, you can increase the R, thus reducing the amount of C you need to form the same time constant. Thus, you can use smaller, cheaper capacitors. You can also use the same resistor value, 100 kΩ, in all four locations, eliminating the need to inventory two resistor values. The final circuit appears in Figure 4.
|Figure 4.||This circuit uses fewer and cheaper components than the circuit in Figure 1.|