We never have enough peripherals on a microcontroller. Whether it’s hardware-driven PWM channels, ADCs, or serial communication peripherals, we always end up wanting just one more of these but don’t really need so many of those. Atmel’s new version of the popular ATmega328 series, the ATmega328PB, seems to have heard our pleas.
Previously, Atmel has introduced four new MCU to its megaAVR MCU family with ATmega168PB coming first with 16 KB Flash, 512 bytes EEPROM and 1 KB RAM, as well as ATmega48PB, ATmega88PB and ATmega328PB to be released in Q1 2015. And if at first there are already some developments, users apply them in their devices and share their impressions, the ATmega328PB remains a mystery until now.
Immediately it should be noted that ATmega328PB is not a drop-in replacement for ATmega328 variants, but a new device. However, the functions are backward compatible with the existing ATmega328 functions. Existing code for these devices will work in the new devices without changing existing configuration or enabling new functions. The code that is available for your existing ATmega328 variants will continue to work on the new ATmega328PB device. Code compiled for ATmega328 variants are compatible and can be executed in the ATmega328PB device. Whereas, reverse code compatibility is not guaranteed.
In this article we do not consider MCU technical specification, and assists the users of Atmel ATmega328 variants to understand the differences and use Atmel ATmega328PB.
The high-performance Atmel ATmega328PB is an 8-bit AVR RISC-based microcontroller (MCU) with picoPower® technology. It combines 32 kB ISP Flash memory with read-while-write capabilities, 1 kB EEPROM, 2 kB SRAM, 27 general purpose I/O lines, 32 general purpose working registers, five flexible timer/counters with compare modes, internal and external interrupts, two USARTs with wake-up on start of transmission, two byte-oriented 2-wire serial interfaces, two SPI serial ports, 8-channel 10-bit A/D converter, programmable watchdog timer with internal oscillator, a unique serial number and six software selectable power saving modes. The device operates between 1.8-5.5 volts. Block diagram (Figure 1) illustrate ATmega328PB functional structure.
|Figure 1.||ATmega328PB Block Diagram.|
To evaluate features of the ATmega328PB MCU and easy integration of the device into a custom design, Atmel offers ATMEGA328PB-XMINI Evalutation Kit (Xplained Mini series) which is made in Arduino shield compatible foot prints.
ATmega328PB supports four additional GPIOs on PORTE [3:0] (Table 1). The GPIO pins PE2 and PE3 are assigned to Pin19 and Pin22. PE2 and PE3 are multiplexed with ADC6 and ADC7. Pin3 (GND) and Pin6 (VCC) are replaced by PE0 and PE1 respectively. PE0 is multiplexed with ACO.
|Table 1.||Pin Functionality Difference between ATmega328
Variants and ATmega328PB
The ATmega328PB is the first 8-bit Atmel AVR device to feature the successful Atmel QTouch Peripheral Touch Controller (PTC). The Peripheral Touch Controller (PTC) acquires signals in order to detect touch on capacitive sensors. The external capacitive touch sensor is typically formed on a PCB, and the sensor electrodes are connected to the analog front end of the PTC through the I/O pins in the device. The PTC supports both self and mutual capacitance sensors.
The PTC supports 24 buttons in self-capacitance mode and up to 144 buttons in mutual-capacitance mode. It is possible to mix and match mutual-and self-capacitance sensors. Only one pin is required per electrode—no external components are required providing considerable savings on the BOM cost compared to competing solutions (Figure 2). In mutual-capacitance mode, sensing is performed using capacitive touch matrices in various X-Y configurations. Whereas in self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor.
|Figure 2.||PTC Block Diagram Self-Capacitance.|
To access the PTC, the user must use the QTouch Composer tool to configure and link the QTouch Library firmware with the application code. QTouch Library can be used to implement buttons, sliders, wheels, and proximity sensor in a variety of combinations on a single interface.
Clock Failure Detection and Switching Mechanism is a new feature introduced in ATmega328PB. This digital logic detects the failure of the Low power crystal oscillator, Full swing crystal oscillator, and external clocks. If a failure is detected, this logic will automatically switch the clock to 1 MHz internal RC system clock.
The Clock Failure Detection mechanism for the device is enabled by an active high fuse. When the CFD fuse is enabled, 128 kHz oscillator will be enabled and the CFD circuit works using that clock. CFD will be automatically disabled when the chip enters power save/down sleep mode. It will be enabled by itself when the chip returns to active mode. CFD will be enabled only when the system frequency is greater than 256 kHz.
ATmega328PB has two additional 16-bit Timer/Counters(TC3 and TC4) with separate Prescaler, Compare Mode, and Capture Mode. There are three 16-bit Timer/Counters (TC1, TC3, and TC4) and ten PWM channels available in ATmega328PB.
The Output Compare Modulator (OCM) allows generation of waveforms modulated with a carrier frequency. The modulator uses the outputs from the Output Compare Unit B of the 16-bit Timer/Counter3 and the Output Compare Unit of the 16-bit Timer/Counter4. When the modulator is enabled, the two output compare channels are modulated together as shown in Figure 3.
|Figure 3.||Output Compare Modulator – Block Diagram.|
The Output Comparator unit 3B and Output compare unit 4B shares the PD2 port pin for output. The outputs of the Output Compare units (OC3B and OC4B) overrides the normal PORTD2 bit when one of them is enabled (that is, when COMnx1:0 is not equal to zero). When both OC3B and OC4B are enabled simultaneously, the modulator is automatically enabled.
ATmega328PB has one additional USART, SPI and TWI with individual configuration registers and separate pin mapping for each module.
Additional USART module with start-of-frame detection, which can wake up the MCU from all sleep modes - when a start bit is detected. The USART start frame detection works both in asynchronous and synchronous modes. When a high-to-low transition is detected on RxDn, the internal 8 MHz oscillator is powered up and the USART clock is enabled. After start-up the rest of the data frame can be received, provided that the baudrate is slow enough to allow the internal 8 MHz oscillator to start up.
Analog Comparator output is available on a pin. The analog comparator’s output is Multiplexed to PE0 when the AC output is enabled by writing a one to the Analog Comparator Output Enable bit (ACOE) in “ACSR0 – Analog Comparator Output Control Register”.
In Atmel ATmega328PB, the unique device ID is now accessible through I/O registers. This unique device ID is available from I/O address 0xF0 - 0xF8. The ID is created by concatenating the nine bytes read out from these registers. These registers are read-only.
Due to the additional communication interfaces, Peripheral Touch Controller and an increased PWM channels, ATmega328PB MCU can be used in various applications including Lighting (Flourescent Ballasts, HID Ballasts, LED Ballasts, Lighting Control) and Smart Energy (Data Concentrators, Electricity Meters, Gas and Water Meters, In-Home Display Units). Additional technical information is available in the datasheet.
The ATmega328PB is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.
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