The bottom waveform shows that, at the upper node of the C₁ capacitor, the V_INB voltage appears within the tracking interval, and it rises to the value of the sum of both input voltages within the get-ready interval

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Other Materials from the Main Document

• Article «Dual-input sample-and-hold amplifier uses no external resistors»
• Figure 1. The basis of the operation of this circuit is the simultaneous tracking of the V_INA and V_INB input voltages on the C₂ and C₁ capacitors, stacking these capacitors within the sample interval, and storing the valu
• Figure 2. The bottom waveform shows that, at the upper node of the C₁ capacitor, the V_INB voltage appears within the tracking interval, and it rises to the value of the sum of both input voltages within the get-ready interval