10092014 Circuit Generates HighFrequency Sine/Cosine Waves From SquareWave InputMixed Signal Integration » MSHFS6John Ambrose, MSI Electronic Design Although quite a few direct digital synthesis (DDS) ICs can generate highfrequency sine waves, their complexity excludes them from many designs. However, designers can use simple highfrequency CMOS logic and two switchedcapacitor filters to create a sine/cosine generator. With newer filters, a 1MHz output at 1.7 V pp is possible.
The example circuit uses an MSHFS6 5V, lowpower 12.5:1 switchedcapacitor filter with selectable Butterworth, Bessel, or elliptic filters in the lowpass mode and full, 1/3, or 1/6octave filters in the bandpass mode. Since the lowpass mode would cause a 3dB loss of the signal output, the circuit uses the 1/6octave bandpass filter, which is selected by tying pins 1 and 3 high on the MSHFS6 (Fig. 1).
Two separate divider circuits are used. The 74HC393A divides the 50MHz clock to 12.5 MHz. The 74HC390A is a dual divideby2 and divideby5 device. By combining the 74HC390 with the 74HC74A dual flipflop, the 50MHz clock can be divided to 500kHz. The 74HC74A provides a Q and /Q output at half the frequency of the divideby25 output of the 74HC390A. Dividing the 74HC74A output by 2 with the divideby2 blocks in the 74HC390A creates two square waves –90° apart. Figure 2 shows a 100MHz square wave input, a 12.5MHz output for the filter clock, and 1MHz sine and –cosine squarewave output before the dividers.
Resistordivider circuits reduce the amplitude from railto rail to prevent generation of distortion in the filters. The use of ac coupling at the MSHFS6 filter inputs ensures smoothed square waves centered around the filters’ analog ground. Figure 3 shows the output of the two filters with an input clock of nearly 50 MHz. If the inverted cosine is not acceptable, an op amp at the cosine filter output or the inverter at pin 13 of the 74HC390A can correct it.
The Lissajous curve for the two outputs (Fig. 4) indicates that the phase circle matches the 89.1° reading in Figure 3. Using a KrohnHite 6900B distortion analyzer and a 1MHz Krohn Hite lowpass filter (to remove the clock), the circuit’s total harmonic distortion on the sine output was only 0.1%.
Although the 74HC390A and 74HC393A have a guaranteed maximum operating frequency of 50 MHz at 6 V, Mixed Signal Integration Corp. and other companies have found that spec to be very conservative.
In this application, a 100MHz input clock achieved the desired divideby4 and divideby100 needed to operate the newer MSVHFS6 switchedcapacitor filter at 3.3 V. The only change needed was to reduce VDD to 3.3 V and replace the 5V MSHFS6 filters with the 3.3V MSVHFS6. The input clock was increased to 100 MHz. Figures 5 and 6 show the filter outputs’ phase relationship in time and as a Lissajous curve. 

