Two-wire interface has galvanic isolation

Maxim MAX253 MAX517 MAX845

Minh-Tam Nguyen, Maxim Integrated

EDN

Unlike the four-wire SPI, QSPI, and Microwire data-interface standards, I2C and SBBus buses require only two wires for data transmission, because they send and receive over the same wire. The circuit in Figure 1 provides galvanic isolation for the two-wire interface. A small transformer and a MAX253 transformer driver (not shown) derive an isolated 5 V rail from the master-side 5 V rail. The data rate and isolation-barrier voltage in your application guide the selection of the transformer and optocoupler. The circuit in Figure 1 uses a Toshiba 6N138 optocoupler. The scheme assumes a µP or µC for the master device, and the current-sink limitation of the processor's SDA terminal dictates that the optocoupler's minimum on-state current be less than 3 mA. Even so, the optocoupler's 300% current-transfer ratio (CTR) is adequate to ensure proper operation in this circuit.

A handful of components provides an isolation barrier for the two wires of an I2C transmission interface.
Figure 1. A handful of components provides an isolation barrier for the two wires of an I2C
transmission interface.

The slave side should host an I2C-compatible device, such as the MAX517 8-bit DAC or the MAX127 data-acquisition system. The master-side SDA and SCL signals are high when the bus is not in use. The I2C Start condition is typically a high-to-low transition on SDA while SCL remains low (Figure 2). With SDA low, current through R2 and the optocoupler's input causes the opto output to produce a signal of approximately 0.4 V (sum of the opto output and the forward-biased Schottky diode, D2). Pull-up resistors R1, R4, and R6 are necessary for I2C compatibility. After the master addresses the slave as described, the addressed slave responds with a low-level acknowledge bit. The bidirectional SDA line allows data transfer in both directions, but the unidirectional SCL line needs only to conduct signals from master to slave. Data transmission ends with the Stop condition, in which SDA typically makes a low-to-high transition while SCL is high.

This digram shows the I2C timing protocol for the MAX517 D/A converter.
Figure 2. This digram shows the I2C timing protocol for the MAX517 D/A converter.

Materials on the topic

  1. Datasheet Toshiba 6N138
  2. Datasheet Maxim Integrated MAX253
  3. Datasheet Maxim Integrated MAX517
  4. Datasheet Maxim Integrated MAX845

EDN

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