.. A1a, combined with the surrounding discretes (Q1, Q2, Q3, etc.), make a VFC similar to the one described in this previous Design Idea, “Voltage inverter design idea transmogrifies into a 1 MHz VFC” ( Ref. 1 ). The U1ab, A1a, ...
.. also ramps on. The turn-on speed is a function of the TPS2331's 14-µA output current and the value of C 3 . The design uses the FETs based on the maximum resistance allowed in the dc path and the FETs' power-dissipation ...
.. a low-cost, micropower, latching motor controller that uses current sensing rather than switches to stop the motor. The design is optimized for a supply voltage of 3 to 9 V, making it well-suited to battery-powered applications. To ...
.. circuit uses a low power op Amp and a p-channel FET to form a diode function with a very low 0.05 volt voltage drop. With the selected FET, the circuit can handle up to 2 Amps of current. Higher currents are possible ...
.. solution and has no component measuring more than 3 mm high. The low profile and low board real estate that this design requires are almost impossible to match using a flyback design or a similar dual-output SEPIC design using a ...
.. for its reference. As anticipated, its display shows that the average output frequency is the 32.768 kHz specified by the design. The divider circuit’s output pulse train was also recorded on a Keysight DSO-X 1102G oscilloscope as ...
.. incorporate PWM control of the output voltage requires some thought, and both Stephen Woodward and I have presented several Design Ideas (DIs) that address this. I’ve suggested disconnecting R G from ground and driving it from a ...
.. the resistor-ratio change, IC 1 ’s output voltage ramps up to its final I/O-voltage value of 3.3 V. The MOSFET this design uses has an on-resistance of roughly 10 Ω. This figure might sound high, but, because of the ...