Circuits & Schematics: CHESS CLOCK - 8

Search for: "CHESS CLOCK"
Search results: 255 Output: 71-80   Including: CLOCK (255); CHESS (0).
  1. Dhananjay Gadre
    .. microcontroller are in C and use the open-source AVR GCC compiler. The AVR ATtiny13 microcontroller operates at an internal clock frequency of 9.6 MHz without an internal-clock-frequency divider, so the PWM frequency is 9.6 MHz/256 = 37.5 ...
    Feb 15, 2019
  1. .. and operating frequency are resistor programmable and the operating frequency can be set to synchronize to an external clock. The LTM8074 also features programmable soft-start, output voltage tracking, power good indicator and enable ...
    Jan 30, 2019
  1. Frank Cox
    .. highpass filters because of their sampled-data nature. Sampled-data systems generate spurious frequencies when the sampling clock of the filter and the input signal mix. These spurious frequencies can include sums and differences of the ...
    Nov 2, 2018
  2. .. selectable lowpass/bandpass switched-capacitor filter removes the harmonics from a square wave you apply to its inputs. The clock for the MSFS5 is 100 times the input square wave. The 74HC390 and 74HC74 form a divide-by-25 and a ...
    Oct 25, 2018
  3. .. sharp rolloff, but the passband is too narrow for a typical application. The filter center is 50 times the center-frequency clock and, according to the datasheet, can differ by 0.9% from the calculated value. If we allow the filter pass area ...
    Aug 2, 2018
  4. Steve Hageman
    Circuits Digital Maxim MAX1658 MAX5400 MAX7301
    .. buffers occupy small footprints on the interface’s PCB (printed-circuit board). For operation at serial-interface clock rates approaching IC 1 ’s 26-MHz maximum, optimize the values of resistors R 1 through R 6 to provide ...
    May 10, 2018
  5. Santosh Bhandarkar
    .. circuit by feeding its output back to its reset pin through an RC network. IC 1 outputs a high on the rising edge of the clock by tying its J input high and its K input low. The pushbutton switch connects between the clock input of IC 1 ...
    Apr 17, 2018
  6. .. side of the I 2 C bus; SDA 1 and SCL 1 are on the slave device’s side. It is fairly easy to optoisolate the clock line because it is unidirectional, from the master to the slave device. A P-channel MOSFET, Q 3 , provides the ...
    Apr 10, 2018
  7. John Ardizzoni
    .. consumer electronics applications, which tend to be lower in frequency and less demanding than typical clock-buffering applications, inexpensive high-speed op amps (~100-MHz bandwidth) can offer an attractive option in ...
    Apr 2, 2018
  8. Rex Niven
    .. time constant, a zero shifts into the register. If the low state is short, then a one shifts into the register. The clock and data signals thus combine into one signal. A lowpass filter separates the clock and data signals (Figure ...
    Mar 19, 2018

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